* CSE can later notice that those loads are all the same and eliminate
* the redundant ones.
*/
- fs_reg vec4_offset = fs_reg(this, glsl_type::int_type);
+ fs_reg vec4_offset = vgrf(glsl_type::int_type);
instructions.push_tail(ADD(vec4_offset,
varying_offset, fs_reg(const_offset & ~3)));
fs_reg payload;
if (dispatch_width == 8)
- payload = fs_reg(this, glsl_type::uvec2_type);
+ payload = vgrf(glsl_type::uvec2_type);
else
- payload = fs_reg(this, glsl_type::uint_type);
+ payload = vgrf(glsl_type::uint_type);
emit(new(mem_ctx) fs_inst(SHADER_OPCODE_SHADER_TIME_ADD,
fs_reg(), payload, offset, value));
return virtual_grf_count++;
}
+fs_reg
+fs_visitor::vgrf(const glsl_type *const type)
+{
+ int reg_width = dispatch_width / 8;
+ return fs_reg(GRF, virtual_grf_alloc(type_size(type) * reg_width),
+ brw_type_for_base_type(type), dispatch_width);
+}
+
/** Fixed HW reg constructor. */
fs_reg::fs_reg(enum register_file file, int reg)
{
this->width = width;
}
-/** Automatic reg constructor. */
-fs_reg::fs_reg(fs_visitor *v, const struct glsl_type *type)
-{
- init();
- int reg_width = v->dispatch_width / 8;
-
- this->file = GRF;
- this->reg = v->virtual_grf_alloc(v->type_size(type) * reg_width);
- this->reg_offset = 0;
- this->type = brw_type_for_base_type(type);
- this->width = v->dispatch_width;
- assert(this->width == 8 || this->width == 16);
-}
-
fs_reg *
fs_visitor::variable_storage(ir_variable *var)
{
{
assert(stage == MESA_SHADER_FRAGMENT);
brw_wm_prog_key *key = (brw_wm_prog_key*) this->key;
- fs_reg *reg = new(this->mem_ctx) fs_reg(this, glsl_type::vec4_type);
+ fs_reg *reg = new(this->mem_ctx) fs_reg(vgrf(glsl_type::vec4_type));
fs_reg wpos = *reg;
bool flip = !origin_upper_left ^ key->render_to_fbo;
fs_reg *
fs_visitor::emit_frontfacing_interpolation()
{
- fs_reg *reg = new(this->mem_ctx) fs_reg(this, glsl_type::bool_type);
+ fs_reg *reg = new(this->mem_ctx) fs_reg(vgrf(glsl_type::bool_type));
if (brw->gen >= 6) {
/* Bit 15 of g0.0 is 0 if the polygon is front facing. We want to create
assert(brw->gen >= 6);
this->current_annotation = "compute sample position";
- fs_reg *reg = new(this->mem_ctx) fs_reg(this, glsl_type::vec2_type);
+ fs_reg *reg = new(this->mem_ctx) fs_reg(vgrf(glsl_type::vec2_type));
fs_reg pos = *reg;
- fs_reg int_sample_x = fs_reg(this, glsl_type::int_type);
- fs_reg int_sample_y = fs_reg(this, glsl_type::int_type);
+ fs_reg int_sample_x = vgrf(glsl_type::int_type);
+ fs_reg int_sample_y = vgrf(glsl_type::int_type);
/* WM will be run in MSDISPMODE_PERSAMPLE. So, only one of SIMD8 or SIMD16
* mode will be enabled.
assert(brw->gen >= 6);
this->current_annotation = "compute sample id";
- fs_reg *reg = new(this->mem_ctx) fs_reg(this, glsl_type::int_type);
+ fs_reg *reg = new(this->mem_ctx) fs_reg(vgrf(glsl_type::int_type));
if (key->compute_sample_id) {
- fs_reg t1 = fs_reg(this, glsl_type::int_type);
- fs_reg t2 = fs_reg(this, glsl_type::int_type);
+ fs_reg t1 = vgrf(glsl_type::int_type);
+ fs_reg t2 = vgrf(glsl_type::int_type);
t2.type = BRW_REGISTER_TYPE_UW;
/* The PS will be run in MSDISPMODE_PERSAMPLE. For example with
if (brw->gen >= 7 && src.file != IMM)
return src;
- fs_reg expanded = fs_reg(this, glsl_type::float_type);
+ fs_reg expanded = vgrf(glsl_type::float_type);
expanded.type = src.type;
emit(BRW_OPCODE_MOV, expanded, src);
return expanded;
current_annotation = inst->annotation;
fs_reg surf_index(stage_prog_data->binding_table.pull_constants_start);
- fs_reg dst = fs_reg(this, glsl_type::float_type);
+ fs_reg dst = vgrf(glsl_type::float_type);
/* Generate a pull load into dst. */
if (inst->src[i].reladdr) {
assert(const_offset_reg.file == IMM &&
const_offset_reg.type == BRW_REGISTER_TYPE_UD);
const_offset_reg.fixed_hw_reg.dw1.ud /= 4;
- fs_reg payload = fs_reg(this, glsl_type::uint_type);
+ fs_reg payload = vgrf(glsl_type::uint_type);
/* We have to use a message header on Skylake to get SIMD4x2 mode.
* Reserve space for the register.
const struct prog_instruction *fpi,
fs_reg dst, fs_reg src)
{
- fs_reg temp = fs_reg(this, glsl_type::float_type);
+ fs_reg temp = vgrf(glsl_type::float_type);
emit_math(opcode, temp, src);
emit_fp_scalar_write(fpi, dst, temp);
}
* mov dst 0.0
* mov.f0 dst 1.0
*/
- fs_reg one = fs_reg(this, glsl_type::float_type);
+ fs_reg one = vgrf(glsl_type::float_type);
emit(MOV(one, fs_reg(1.0f)));
for (unsigned int insn = 0; insn < prog->NumInstructions; insn++) {
/* We always emit into a temporary destination register to avoid
* aliasing issues.
*/
- dst = fs_reg(this, glsl_type::vec4_type);
+ dst = vgrf(glsl_type::vec4_type);
for (int i = 0; i < 3; i++)
src[i] = get_fp_src_reg(&fpi->SrcReg[i]);
case OPCODE_DP3:
case OPCODE_DP4:
case OPCODE_DPH: {
- fs_reg mul = fs_reg(this, glsl_type::float_type);
- fs_reg acc = fs_reg(this, glsl_type::float_type);
+ fs_reg mul = vgrf(glsl_type::float_type);
+ fs_reg acc = vgrf(glsl_type::float_type);
int count;
switch (fpi->Opcode) {
case OPCODE_MAD:
for (int i = 0; i < 4; i++) {
if (fpi->DstReg.WriteMask & (1 << i)) {
- fs_reg temp = fs_reg(this, glsl_type::float_type);
+ fs_reg temp = vgrf(glsl_type::float_type);
emit(MUL(temp, offset(src[0], i), offset(src[1], i)));
emit(ADD(offset(dst, i), temp, offset(src[2], i)));
}
break;
case OPCODE_POW: {
- fs_reg temp = fs_reg(this, glsl_type::float_type);
+ fs_reg temp = vgrf(glsl_type::float_type);
emit_math(SHADER_OPCODE_POW, temp, src[0], src[1]);
emit_fp_scalar_write(fpi, dst, temp);
break;
case OPCODE_TXP: {
op = ir_tex;
- coordinate = fs_reg(this, glsl_type::vec3_type);
- fs_reg invproj = fs_reg(this, glsl_type::float_type);
+ coordinate = vgrf(glsl_type::vec3_type);
+ fs_reg invproj = vgrf(glsl_type::float_type);
emit_math(SHADER_OPCODE_RCP, invproj, offset(src[0], 3));
for (int i = 0; i < 3; i++) {
emit(MUL(offset(coordinate, i),
case TEXTURE_CUBE_INDEX: {
coord_components = 4;
- fs_reg temp = fs_reg(this, glsl_type::float_type);
- fs_reg cubecoord = fs_reg(this, glsl_type::vec3_type);
+ fs_reg temp = vgrf(glsl_type::float_type);
+ fs_reg cubecoord = vgrf(glsl_type::vec3_type);
fs_reg abscoord = coordinate;
abscoord.negate = false;
abscoord.abs = true;
int i1 = (i + 1) % 3;
int i2 = (i + 2) % 3;
- fs_reg temp = fs_reg(this, glsl_type::float_type);
+ fs_reg temp = vgrf(glsl_type::float_type);
fs_reg neg_src1_1 = offset(src[1], i1);
neg_src1_1.negate = !neg_src1_1.negate;
emit(MUL(temp, offset(src[0], i2), neg_src1_1));
*/
this->current_annotation = "result.depth write";
if (frag_depth.file != BAD_FILE) {
- fs_reg temp = fs_reg(this, glsl_type::float_type);
+ fs_reg temp = vgrf(glsl_type::float_type);
emit(MOV(temp, offset(frag_depth, 2)));
frag_depth = temp;
}
int num_temp = prog->NumTemporaries;
fp_temp_regs = rzalloc_array(mem_ctx, fs_reg, num_temp);
for (int i = 0; i < num_temp; i++)
- fp_temp_regs[i] = fs_reg(this, glsl_type::vec4_type);
+ fp_temp_regs[i] = vgrf(glsl_type::vec4_type);
/* PROGRAM_STATE_VAR etc. */
if (dispatch_width == 8) {
fp_input_regs[i] = *emit_frontfacing_interpolation();
break;
default:
- fp_input_regs[i] = fs_reg(this, glsl_type::vec4_type);
+ fp_input_regs[i] = vgrf(glsl_type::vec4_type);
emit_general_interpolation(fp_input_regs[i], "fp_input",
glsl_type::vec4_type,
INTERP_QUALIFIER_NONE,
case PROGRAM_OUTPUT:
if (dst->Index == FRAG_RESULT_DEPTH) {
if (frag_depth.file == BAD_FILE)
- frag_depth = fs_reg(this, glsl_type::vec4_type);
+ frag_depth = vgrf(glsl_type::vec4_type);
return frag_depth;
} else if (dst->Index == FRAG_RESULT_COLOR) {
if (outputs[0].file == BAD_FILE) {
- outputs[0] = fs_reg(this, glsl_type::vec4_type);
+ outputs[0] = vgrf(glsl_type::vec4_type);
output_components[0] = 4;
/* Tell emit_fb_writes() to smear fragment.color across all the
} else {
int output_index = dst->Index - FRAG_RESULT_DATA0;
if (outputs[output_index].file == BAD_FILE) {
- outputs[output_index] = fs_reg(this, glsl_type::vec4_type);
+ outputs[output_index] = vgrf(glsl_type::vec4_type);
}
output_components[output_index] = 4;
return outputs[output_index];
default:
_mesa_problem(ctx, "bad dst register file: %s\n",
_mesa_register_file_name((gl_register_file)dst->File));
- return fs_reg(this, glsl_type::vec4_type);
+ return vgrf(glsl_type::vec4_type);
}
}
*/
switch (plist->Parameters[src->Index].Type) {
case PROGRAM_CONSTANT: {
- result = fs_reg(this, glsl_type::vec4_type);
+ result = vgrf(glsl_type::vec4_type);
for (int i = 0; i < 4; i++) {
emit(MOV(offset(result, i),
default:
_mesa_problem(ctx, "bad uniform src register file: %s\n",
_mesa_register_file_name((gl_register_file)src->File));
- return fs_reg(this, glsl_type::vec4_type);
+ return vgrf(glsl_type::vec4_type);
}
break;
default:
_mesa_problem(ctx, "bad src register file: %s\n",
_mesa_register_file_name((gl_register_file)src->File));
- return fs_reg(this, glsl_type::vec4_type);
+ return vgrf(glsl_type::vec4_type);
}
if (src->Swizzle != SWIZZLE_NOOP || src->Negate) {
fs_reg unswizzled = result;
- result = fs_reg(this, glsl_type::vec4_type);
+ result = vgrf(glsl_type::vec4_type);
for (int i = 0; i < 4; i++) {
bool negate = src->Negate & (1 << i);
/* The ZERO, ONE, and Negate options are only used for OPCODE_SWZ,
} else if (!strcmp(ir->name, "gl_FrontFacing")) {
reg = emit_frontfacing_interpolation();
} else {
- reg = new(this->mem_ctx) fs_reg(this, ir->type);
+ reg = new(this->mem_ctx) fs_reg(vgrf(ir->type));
emit_general_interpolation(*reg, ir->name, ir->type,
(glsl_interp_qualifier) ir->data.interpolation,
ir->data.location, ir->data.centroid,
hash_table_insert(this->variable_ht, reg, ir);
return;
} else if (ir->data.mode == ir_var_shader_out) {
- reg = new(this->mem_ctx) fs_reg(this, ir->type);
+ reg = new(this->mem_ctx) fs_reg(vgrf(ir->type));
if (stage == MESA_SHADER_VERTEX) {
int vector_elements =
}
if (!reg)
- reg = new(this->mem_ctx) fs_reg(this, ir->type);
+ reg = new(this->mem_ctx) fs_reg(vgrf(ir->type));
hash_table_insert(this->variable_ht, reg, ir);
}
ir->array_index->accept(this);
fs_reg index_reg;
- index_reg = fs_reg(this, glsl_type::int_type);
+ index_reg = vgrf(glsl_type::int_type);
emit(BRW_OPCODE_MUL, index_reg, this->result, fs_reg(element_size));
if (src.reladdr) {
{
if (brw->gen < 6) {
/* We can't use the LRP instruction. Emit x*(1-a) + y*a. */
- fs_reg y_times_a = fs_reg(this, glsl_type::float_type);
- fs_reg one_minus_a = fs_reg(this, glsl_type::float_type);
- fs_reg x_times_one_minus_a = fs_reg(this, glsl_type::float_type);
+ fs_reg y_times_a = vgrf(glsl_type::float_type);
+ fs_reg one_minus_a = vgrf(glsl_type::float_type);
+ fs_reg x_times_one_minus_a = vgrf(glsl_type::float_type);
emit(MUL(y_times_a, y, a));
non_const_mul->accept(this);
fs_reg src1 = this->result;
- fs_reg src0 = fs_reg(this, ir->type);
+ fs_reg src0 = vgrf(ir->type);
emit(BRW_OPCODE_MOV, src0,
fs_reg((uint8_t)mul_operand_vf, 0, 0, (uint8_t)add_operand_vf));
- this->result = fs_reg(this, ir->type);
+ this->result = vgrf(ir->type);
emit(BRW_OPCODE_LINE, this->result, src0, src1);
return true;
}
if (mul_abs)
src2.negate = false;
- this->result = fs_reg(this, ir->type);
+ this->result = vgrf(ir->type);
emit(BRW_OPCODE_MAD, this->result, src0, src1, src2);
return true;
/* 1. collect interpolation factors */
- fs_reg dst_x = fs_reg(this, glsl_type::get_instance(ir->type->base_type, 2, 1));
+ fs_reg dst_x = vgrf(glsl_type::get_instance(ir->type->base_type, 2, 1));
fs_reg dst_y = offset(dst_x, 1);
/* for most messages, we need one reg of ignored data; the hardware requires mlen==1
* even when there is no payload. in the per-slot offset case, we'll replace this with
* the proper source data. */
- fs_reg src = fs_reg(this, glsl_type::float_type);
+ fs_reg src = vgrf(glsl_type::float_type);
int mlen = 1; /* one reg unless overriden */
int reg_width = dispatch_width / 8;
fs_inst *inst;
} else {
/* pack the operands: hw wants offsets as 4 bit signed ints */
ir->operands[1]->accept(this);
- src = fs_reg(this, glsl_type::ivec2_type);
+ src = vgrf(glsl_type::ivec2_type);
fs_reg src2 = src;
for (int i = 0; i < 2; i++) {
- fs_reg temp = fs_reg(this, glsl_type::float_type);
+ fs_reg temp = vgrf(glsl_type::float_type);
emit(MUL(temp, this->result, fs_reg(16.0f)));
emit(MOV(src2, temp)); /* float to int */
/* 2. emit linterp */
- fs_reg res(this, ir->type);
+ fs_reg res = vgrf(ir->type);
this->result = res;
for (int i = 0; i < ir->type->vector_elements; i++) {
emit_bool_to_cond_code(ir->operands[0]);
- this->result = fs_reg(this, ir->type);
+ this->result = vgrf(ir->type);
inst = emit(SEL(this->result, op[1], op[2]));
inst->predicate = BRW_PREDICATE_NORMAL;
return;
/* Storage for our result. If our result goes into an assignment, it will
* just get copy-propagated out, so no worries.
*/
- this->result = fs_reg(this, ir->type);
+ this->result = vgrf(ir->type);
switch (ir->operation) {
case ir_unop_logic_not:
emit(RNDZ(this->result, op[0]));
break;
case ir_unop_ceil: {
- fs_reg tmp = fs_reg(this, ir->type);
+ fs_reg tmp = vgrf(ir->type);
op[0].negate = !op[0].negate;
emit(RNDD(tmp, op[0]));
tmp.negate = true;
emit(CBIT(this->result, op[0]));
break;
case ir_unop_find_msb:
- temp = fs_reg(this, glsl_type::uint_type);
+ temp = vgrf(glsl_type::uint_type);
emit(FBH(temp, op[0]));
/* FBH counts from the MSB side, while GLSL's findMSB() wants the count
* per-channel and add the base UBO index; the generator will select
* a value from any live channel.
*/
- surf_index = fs_reg(this, glsl_type::uint_type);
+ surf_index = vgrf(glsl_type::uint_type);
emit(ADD(surf_index, op[0],
fs_reg(stage_prog_data->binding_table.ubo_start)))
->force_writemask_all = true;
}
if (const_offset) {
- fs_reg packed_consts = fs_reg(this, glsl_type::float_type);
+ fs_reg packed_consts = vgrf(glsl_type::float_type);
packed_consts.type = result.type;
fs_reg const_offset_reg = fs_reg(const_offset->value.u[0] & ~15);
}
} else {
/* Turn the byte offset into a dword offset. */
- fs_reg base_offset = fs_reg(this, glsl_type::int_type);
+ fs_reg base_offset = vgrf(glsl_type::int_type);
emit(SHR(base_offset, op[1], fs_reg(2)));
for (int i = 0; i < ir->type->vector_elements; i++) {
fs_reg *sources = ralloc_array(mem_ctx, fs_reg, MAX_SAMPLER_MESSAGE_SIZE);
for (int i = 0; i < MAX_SAMPLER_MESSAGE_SIZE; i++) {
- sources[i] = fs_reg(this, glsl_type::float_type);
+ sources[i] = vgrf(glsl_type::float_type);
}
int length = 0;
* for clamping, but we don't care enough to make a new
* parameter type, so just invert back.
*/
- fs_reg limit = fs_reg(this, glsl_type::float_type);
+ fs_reg limit = vgrf(glsl_type::float_type);
emit(MOV(limit, i == 0 ? scale_x : scale_y));
emit(SHADER_OPCODE_RCP, limit, limit);
int reg_width = dispatch_width / 8;
fs_reg payload = fs_reg(GRF, virtual_grf_alloc(components * reg_width),
BRW_REGISTER_TYPE_F);
- fs_reg dest = fs_reg(this, glsl_type::uvec4_type);
+ fs_reg dest = vgrf(glsl_type::uvec4_type);
fs_reg *sources = ralloc_array(mem_ctx, fs_reg, components);
/* parameters are: u, v, r; missing parameters are treated as zero */
for (int i = 0; i < components; i++) {
- sources[i] = fs_reg(this, glsl_type::float_type);
+ sources[i] = vgrf(glsl_type::float_type);
emit(MOV(retype(sources[i], BRW_REGISTER_TYPE_D), coordinate));
coordinate = offset(coordinate, 1);
}
int swiz = GET_SWZ(tex->swizzles[sampler], gather_component);
if (swiz == SWIZZLE_ZERO || swiz == SWIZZLE_ONE) {
- fs_reg res = fs_reg(this, glsl_type::vec4_type);
+ fs_reg res = vgrf(glsl_type::vec4_type);
this->result = res;
for (int i=0; i<4; i++) {
/* Writemasking doesn't eliminate channels on SIMD8 texture
* samples, so don't worry about them.
*/
- fs_reg dst(this, glsl_type::get_instance(dest_type->base_type, 4, 1));
+ fs_reg dst = vgrf(glsl_type::get_instance(dest_type->base_type, 4, 1));
if (brw->gen >= 7) {
inst = emit_texture_gen7(op, dst, coordinate, coord_components,
/* fixup #layers for cube map arrays */
if (op == ir_txs && is_cube_array) {
fs_reg depth = offset(dst, 2);
- fs_reg fixed_depth = fs_reg(this, glsl_type::int_type);
+ fs_reg fixed_depth = vgrf(glsl_type::int_type);
emit_math(SHADER_OPCODE_INT_QUOTIENT, fixed_depth, depth, fs_reg(6));
fs_reg *fixed_payload = ralloc_array(mem_ctx, fs_reg, inst->regs_written);
/* Emit code to evaluate the actual indexing expression */
nonconst_sampler_index->accept(this);
- fs_reg temp(this, glsl_type::uint_type);
+ fs_reg temp = vgrf(glsl_type::uint_type);
emit(ADD(temp, this->result, fs_reg(sampler)))
->force_writemask_all = true;
sampler_reg = temp;
if (dest_components == 1) {
/* Ignore DEPTH_TEXTURE_MODE swizzling. */
} else if (tex->swizzles[sampler] != SWIZZLE_NOOP) {
- fs_reg swizzled_result = fs_reg(this, glsl_type::vec4_type);
+ fs_reg swizzled_result = vgrf(glsl_type::vec4_type);
swizzled_result.type = orig_val.type;
for (int i = 0; i < 4; i++) {
return;
}
- fs_reg result = fs_reg(this, ir->type);
+ fs_reg result = vgrf(ir->type);
this->result = result;
for (unsigned int i = 0; i < ir->type->vector_elements; i++) {
* Make reg constant so that it doesn't get accidentally modified along the
* way. Yes, I actually had this problem. :(
*/
- const fs_reg reg(this, ir->type);
+ const fs_reg reg = vgrf(ir->type);
fs_reg dst_reg = reg;
if (ir->type->is_array()) {
case ir_binop_logic_xor:
if (brw->gen <= 5) {
- fs_reg temp = fs_reg(this, ir->type);
+ fs_reg temp = vgrf(ir->type);
emit(XOR(temp, op[0], op[1]));
inst = emit(AND(reg_null_d, temp, fs_reg(1)));
} else {
case ir_binop_logic_or:
if (brw->gen <= 5) {
- fs_reg temp = fs_reg(this, ir->type);
+ fs_reg temp = vgrf(ir->type);
emit(OR(temp, op[0], op[1]));
inst = emit(AND(reg_null_d, temp, fs_reg(1)));
} else {
case ir_binop_logic_and:
if (brw->gen <= 5) {
- fs_reg temp = fs_reg(this, ir->type);
+ fs_reg temp = vgrf(ir->type);
emit(AND(temp, op[0], op[1]));
inst = emit(AND(reg_null_d, temp, fs_reg(1)));
} else {
inst->conditional_mod = BRW_CONDITIONAL_NZ;
/* Select which boolean to return. */
- fs_reg temp(this, expr->operands[1]->type);
+ fs_reg temp = vgrf(expr->operands[1]->type);
inst = emit(SEL(temp, op[1], op[2]));
inst->predicate = BRW_PREDICATE_NORMAL;
return;
case ir_binop_logic_or:
- temp = fs_reg(this, glsl_type::bool_type);
+ temp = vgrf(glsl_type::bool_type);
emit(OR(temp, op[0], op[1]));
emit(IF(temp, fs_reg(0), BRW_CONDITIONAL_NZ));
return;
case ir_binop_logic_and:
- temp = fs_reg(this, glsl_type::bool_type);
+ temp = vgrf(glsl_type::bool_type);
emit(AND(temp, op[0], op[1]));
emit(IF(temp, fs_reg(0), BRW_CONDITIONAL_NZ));
return;
inst->conditional_mod = BRW_CONDITIONAL_NZ;
/* Select which boolean to use as the result. */
- fs_reg temp(this, expr->operands[1]->type);
+ fs_reg temp = vgrf(expr->operands[1]->type);
inst = emit(SEL(temp, op[1], op[2]));
inst->predicate = BRW_PREDICATE_NORMAL;
*/
fs_reg src0(then_mov->src[0]);
if (src0.file == IMM) {
- src0 = fs_reg(this, glsl_type::float_type);
+ src0 = vgrf(glsl_type::float_type);
src0.type = then_mov->src[0].type;
emit(MOV(src0, then_mov->src[0]));
}
location->data.binding);
/* Calculate the surface offset */
- fs_reg offset(this, glsl_type::uint_type);
+ fs_reg offset = vgrf(glsl_type::uint_type);
ir_dereference_array *deref_array = deref->as_dereference_array();
if (deref_array) {
deref_array->array_index->accept(this);
- fs_reg tmp(this, glsl_type::uint_type);
+ fs_reg tmp = vgrf(glsl_type::uint_type);
emit(MUL(tmp, this->result, fs_reg(ATOMIC_COUNTER_SIZE)));
emit(ADD(offset, tmp, fs_reg(location->data.atomic.offset)));
} else {
length++;
/* Set the atomic operation offset. */
- sources[1] = fs_reg(this, glsl_type::uint_type);
+ sources[1] = vgrf(glsl_type::uint_type);
emit(MOV(sources[1], offset));
length++;
/* Set the atomic operation arguments. */
if (src0.file != BAD_FILE) {
- sources[length] = fs_reg(this, glsl_type::uint_type);
+ sources[length] = vgrf(glsl_type::uint_type);
emit(MOV(sources[length], src0));
length++;
}
if (src1.file != BAD_FILE) {
- sources[length] = fs_reg(this, glsl_type::uint_type);
+ sources[length] = vgrf(glsl_type::uint_type);
emit(MOV(sources[length], src1));
length++;
}
}
/* Set the surface read offset. */
- sources[1] = fs_reg(this, glsl_type::uint_type);
+ sources[1] = vgrf(glsl_type::uint_type);
emit(MOV(sources[1], offset));
int mlen = 1 + reg_width;
fs_visitor::emit_interpolation_setup_gen4()
{
this->current_annotation = "compute pixel centers";
- this->pixel_x = fs_reg(this, glsl_type::uint_type);
- this->pixel_y = fs_reg(this, glsl_type::uint_type);
+ this->pixel_x = vgrf(glsl_type::uint_type);
+ this->pixel_y = vgrf(glsl_type::uint_type);
this->pixel_x.type = BRW_REGISTER_TYPE_UW;
this->pixel_y.type = BRW_REGISTER_TYPE_UW;
this->current_annotation = "compute pixel deltas from v0";
if (brw->has_pln) {
this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] =
- fs_reg(this, glsl_type::vec2_type);
+ vgrf(glsl_type::vec2_type);
this->delta_y[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] =
offset(this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC], 1);
} else {
this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] =
- fs_reg(this, glsl_type::float_type);
+ vgrf(glsl_type::float_type);
this->delta_y[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] =
- fs_reg(this, glsl_type::float_type);
+ vgrf(glsl_type::float_type);
}
emit(ADD(this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
this->pixel_x, fs_reg(negate(brw_vec1_grf(1, 0)))));
/* Compute wpos.w. It's always in our setup, since it's needed to
* interpolate the other attributes.
*/
- this->wpos_w = fs_reg(this, glsl_type::float_type);
+ this->wpos_w = vgrf(glsl_type::float_type);
emit(FS_OPCODE_LINTERP, wpos_w,
this->delta_x[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
this->delta_y[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
interp_reg(VARYING_SLOT_POS, 3));
/* Compute the pixel 1/W value from wpos.w. */
- this->pixel_w = fs_reg(this, glsl_type::float_type);
+ this->pixel_w = vgrf(glsl_type::float_type);
emit_math(SHADER_OPCODE_RCP, this->pixel_w, wpos_w);
this->current_annotation = NULL;
}
/* If the pixel centers end up used, the setup is the same as for gen4. */
this->current_annotation = "compute pixel centers";
- fs_reg int_pixel_x = fs_reg(this, glsl_type::uint_type);
- fs_reg int_pixel_y = fs_reg(this, glsl_type::uint_type);
+ fs_reg int_pixel_x = vgrf(glsl_type::uint_type);
+ fs_reg int_pixel_y = vgrf(glsl_type::uint_type);
int_pixel_x.type = BRW_REGISTER_TYPE_UW;
int_pixel_y.type = BRW_REGISTER_TYPE_UW;
emit(ADD(int_pixel_x,
* to turn the integer pixel centers into floats for their actual
* use.
*/
- this->pixel_x = fs_reg(this, glsl_type::float_type);
- this->pixel_y = fs_reg(this, glsl_type::float_type);
+ this->pixel_x = vgrf(glsl_type::float_type);
+ this->pixel_y = vgrf(glsl_type::float_type);
emit(MOV(this->pixel_x, int_pixel_x));
emit(MOV(this->pixel_y, int_pixel_y));
this->current_annotation = "compute pos.w";
this->pixel_w = fs_reg(brw_vec8_grf(payload.source_w_reg, 0));
- this->wpos_w = fs_reg(this, glsl_type::float_type);
+ this->wpos_w = vgrf(glsl_type::float_type);
emit_math(SHADER_OPCODE_RCP, this->wpos_w, this->pixel_w);
for (int i = 0; i < BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT; ++i) {
no16("Missing support for simd16 depth writes on gen6\n");
}
- sources[length] = fs_reg(this, glsl_type::float_type);
+ sources[length] = vgrf(glsl_type::float_type);
if (prog->OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
/* Hand over gl_FragDepth. */
assert(this->frag_depth.file != BAD_FILE);
}
if (payload.dest_depth_reg) {
- sources[length] = fs_reg(this, glsl_type::float_type);
+ sources[length] = vgrf(glsl_type::float_type);
emit(MOV(sources[length],
fs_reg(brw_vec8_grf(payload.dest_depth_reg, 0))));
length++;
current_annotation = "user clip distances";
- this->outputs[VARYING_SLOT_CLIP_DIST0] = fs_reg(this, glsl_type::vec4_type);
- this->outputs[VARYING_SLOT_CLIP_DIST1] = fs_reg(this, glsl_type::vec4_type);
+ this->outputs[VARYING_SLOT_CLIP_DIST0] = vgrf(glsl_type::vec4_type);
+ this->outputs[VARYING_SLOT_CLIP_DIST1] = vgrf(glsl_type::vec4_type);
for (int i = 0; i < key->nr_userclip_plane_consts; i++) {
fs_reg u = userplane[i];
!reg->negate)
return;
- fs_reg temp = fs_reg(this, glsl_type::uint_type);
+ fs_reg temp = vgrf(glsl_type::uint_type);
emit(MOV(temp, *reg));
*reg = temp;
}
if (rvalue->type != glsl_type::bool_type)
return;
- fs_reg and_result = fs_reg(this, glsl_type::bool_type);
- fs_reg neg_result = fs_reg(this, glsl_type::bool_type);
+ fs_reg and_result = vgrf(glsl_type::bool_type);
+ fs_reg neg_result = vgrf(glsl_type::bool_type);
emit(AND(and_result, *reg, fs_reg(1)));
emit(MOV(neg_result, negate(and_result)));
*reg = neg_result;
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