lm32: split lm32_include.v

diff --git a/verilog/lm32/lm32_config.v b/verilog/lm32/lm32_config.v
new file mode 100644 (file)
index 0000000..bf49a6f
--- /dev/null
+++ b/verilog/lm32/lm32_config.v
@@ -0,0 +1,39 @@
+`ifdef LM32_CONFIG_V
+`else
+`define LM32_CONFIG_V
+
+`define CFG_EBA_RESET 32'h00860000
+`define CFG_DEBA_RESET 32'h10000000
+
+`define CFG_PL_MULTIPLY_ENABLED
+`define CFG_PL_BARREL_SHIFT_ENABLED
+`define CFG_SIGN_EXTEND_ENABLED
+`define CFG_MC_DIVIDE_ENABLED
+`define CFG_EBR_POSEDGE_REGISTER_FILE
+
+`define CFG_ICACHE_ENABLED
+`define CFG_ICACHE_ASSOCIATIVITY   1
+`define CFG_ICACHE_SETS            256
+`define CFG_ICACHE_BYTES_PER_LINE  16
+`define CFG_ICACHE_BASE_ADDRESS    32'h0
+`define CFG_ICACHE_LIMIT           32'h7fffffff
+
+`define CFG_DCACHE_ENABLED
+`define CFG_DCACHE_ASSOCIATIVITY   1
+`define CFG_DCACHE_SETS            256
+`define CFG_DCACHE_BYTES_PER_LINE  16
+`define CFG_DCACHE_BASE_ADDRESS    32'h0
+`define CFG_DCACHE_LIMIT           32'h7fffffff
+
+// Enable Debugging
+//`define CFG_JTAG_ENABLED
+//`define CFG_JTAG_UART_ENABLED
+//`define CFG_DEBUG_ENABLED
+//`define CFG_HW_DEBUG_ENABLED
+//`define CFG_ROM_DEBUG_ENABLED
+//`define CFG_BREAKPOINTS 32'h4
+//`define CFG_WATCHPOINTS 32'h4
+//`define CFG_EXTERNAL_BREAK_ENABLED
+//`define CFG_GDBSTUB_ENABLED
+
+`endif

diff --git a/verilog/lm32/lm32_include.v b/verilog/lm32/lm32_include.v
index 512c68bbd0d8e6e063f0d382e465d9c9b4c323ad..2e25874e0d6281711cb495763fd65a14297725bb 100644 (file)
--- a/verilog/lm32/lm32_include.v
+++ b/verilog/lm32/lm32_include.v
@@ -58,39 +58,7 @@
 // Common configuration options
 //
 
-`define CFG_EBA_RESET 32'h00860000
-`define CFG_DEBA_RESET 32'h10000000
-
-`define CFG_PL_MULTIPLY_ENABLED
-`define CFG_PL_BARREL_SHIFT_ENABLED
-`define CFG_SIGN_EXTEND_ENABLED
-`define CFG_MC_DIVIDE_ENABLED
-`define CFG_EBR_POSEDGE_REGISTER_FILE
-
-`define CFG_ICACHE_ENABLED
-`define CFG_ICACHE_ASSOCIATIVITY   1
-`define CFG_ICACHE_SETS            256
-`define CFG_ICACHE_BYTES_PER_LINE  16
-`define CFG_ICACHE_BASE_ADDRESS    32'h0
-`define CFG_ICACHE_LIMIT           32'h7fffffff
-
-`define CFG_DCACHE_ENABLED
-`define CFG_DCACHE_ASSOCIATIVITY   1
-`define CFG_DCACHE_SETS            256
-`define CFG_DCACHE_BYTES_PER_LINE  16
-`define CFG_DCACHE_BASE_ADDRESS    32'h0
-`define CFG_DCACHE_LIMIT           32'h7fffffff
-
-// Enable Debugging
-//`define CFG_JTAG_ENABLED
-//`define CFG_JTAG_UART_ENABLED
-//`define CFG_DEBUG_ENABLED
-//`define CFG_HW_DEBUG_ENABLED
-//`define CFG_ROM_DEBUG_ENABLED
-//`define CFG_BREAKPOINTS 32'h4
-//`define CFG_WATCHPOINTS 32'h4
-//`define CFG_EXTERNAL_BREAK_ENABLED
-//`define CFG_GDBSTUB_ENABLED
+`include "lm32_config.v"
 
 //
 // End of common configuration options