anv: Share URB setup between gen7 and gen8+

diff --git a/src/vulkan/gen7_pipeline.c b/src/vulkan/gen7_pipeline.c
index 42c50310e374bb6aaa315787ea38ec11df2ff033..bf30f59be7b2282f971e70a14c65b9c3f2da6d73 100644 (file)
--- a/src/vulkan/gen7_pipeline.c
+++ b/src/vulkan/gen7_pipeline.c
@@ -227,28 +227,7 @@ genX(graphics_pipeline_create)(
    anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_DS, .DSFunctionEnable = false);
    anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
 
-   /* From the IVB PRM Vol. 2, Part 1, Section 3.2.1:
-    *
-    *    "A PIPE_CONTROL with Post-Sync Operation set to 1h and a depth stall
-    *    needs to be sent just prior to any 3DSTATE_VS, 3DSTATE_URB_VS,
-    *    3DSTATE_CONSTANT_VS, 3DSTATE_BINDING_TABLE_POINTER_VS,
-    *    3DSTATE_SAMPLER_STATE_POINTER_VS command.  Only one PIPE_CONTROL
-    *    needs to be sent before any combination of VS associated 3DSTATE."
-    */
-   anv_batch_emit(&pipeline->batch, GEN7_PIPE_CONTROL,
-                  .DepthStallEnable = true,
-                  .PostSyncOperation = WriteImmediateData,
-                  .Address = { &device->workaround_bo, 0 });
-
-   anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
-                  .ConstantBufferOffset = 0,
-                  .ConstantBufferSize = 4);
-   anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
-                  .ConstantBufferOffset = 4,
-                  .ConstantBufferSize = 4);
-   anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
-                  .ConstantBufferOffset = 8,
-                  .ConstantBufferSize = 4);
+   emit_urb_setup(pipeline);
 
    anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_AA_LINE_PARAMETERS);
 
@@ -283,26 +262,6 @@ genX(graphics_pipeline_create)(
    anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_SAMPLE_MASK,
       .SampleMask                               = 0xff);
 
-   anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_URB_VS,
-      .VSURBStartingAddress                     = pipeline->urb.vs_start,
-      .VSURBEntryAllocationSize                 = pipeline->urb.vs_size - 1,
-      .VSNumberofURBEntries                     = pipeline->urb.nr_vs_entries);
-
-   anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_URB_GS,
-      .GSURBStartingAddress                     = pipeline->urb.gs_start,
-      .GSURBEntryAllocationSize                 = pipeline->urb.gs_size - 1,
-      .GSNumberofURBEntries                     = pipeline->urb.nr_gs_entries);
-
-   anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_URB_HS,
-      .HSURBStartingAddress                     = pipeline->urb.vs_start,
-      .HSURBEntryAllocationSize                 = 0,
-      .HSNumberofURBEntries                     = 0);
-
-   anv_batch_emit(&pipeline->batch, GEN7_3DSTATE_URB_DS,
-      .DSURBStartingAddress                     = pipeline->urb.vs_start,
-      .DSURBEntryAllocationSize                 = 0,
-      .DSNumberofURBEntries                     = 0);
-
    const struct brw_vue_prog_data *vue_prog_data = &pipeline->vs_prog_data.base;
    /* The last geometry producing stage will set urb_offset and urb_length,
     * which we use in 3DSTATE_SBE. Skip the VUE header and position slots. */

diff --git a/src/vulkan/gen8_pipeline.c b/src/vulkan/gen8_pipeline.c
index fce2331873c5a5329b0fba59f021bb607c1856ee..c1295a0b83a19c31d18eb31d7588f82e9a7fa027 100644 (file)
--- a/src/vulkan/gen8_pipeline.c
+++ b/src/vulkan/gen8_pipeline.c
@@ -366,15 +366,7 @@ genX(graphics_pipeline_create)(
    anv_batch_emit(&pipeline->batch, GENX(3DSTATE_DS), .FunctionEnable = false);
    anv_batch_emit(&pipeline->batch, GENX(3DSTATE_STREAMOUT), .SOFunctionEnable = false);
 
-   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PUSH_CONSTANT_ALLOC_VS),
-                  .ConstantBufferOffset = 0,
-                  .ConstantBufferSize = 4);
-   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PUSH_CONSTANT_ALLOC_GS),
-                  .ConstantBufferOffset = 4,
-                  .ConstantBufferSize = 4);
-   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PUSH_CONSTANT_ALLOC_PS),
-                  .ConstantBufferOffset = 8,
-                  .ConstantBufferSize = 4);
+   emit_urb_setup(pipeline);
 
    anv_batch_emit(&pipeline->batch, GENX(3DSTATE_WM_CHROMAKEY),
                   .ChromaKeyKillEnable = false);
@@ -398,26 +390,6 @@ genX(graphics_pipeline_create)(
                      pipeline->ps_ksp0 == NO_KERNEL ?
                      0 : pipeline->wm_prog_data.barycentric_interp_modes);
 
-   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_VS),
-                  .VSURBStartingAddress = pipeline->urb.vs_start,
-                  .VSURBEntryAllocationSize = pipeline->urb.vs_size - 1,
-                  .VSNumberofURBEntries = pipeline->urb.nr_vs_entries);
-
-   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_GS),
-                  .GSURBStartingAddress = pipeline->urb.gs_start,
-                  .GSURBEntryAllocationSize = pipeline->urb.gs_size - 1,
-                  .GSNumberofURBEntries = pipeline->urb.nr_gs_entries);
-
-   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_HS),
-                  .HSURBStartingAddress = pipeline->urb.vs_start,
-                  .HSURBEntryAllocationSize = 0,
-                  .HSNumberofURBEntries = 0);
-
-   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_DS),
-                  .DSURBStartingAddress = pipeline->urb.vs_start,
-                  .DSURBEntryAllocationSize = 0,
-                  .DSNumberofURBEntries = 0);
-
    const struct brw_gs_prog_data *gs_prog_data = &pipeline->gs_prog_data;
    offset = 1;
    length = (gs_prog_data->base.vue_map.num_slots + 1) / 2 - offset;

diff --git a/src/vulkan/genX_pipeline_util.h b/src/vulkan/genX_pipeline_util.h
index da61a1e5d39a68d0b4a4e1514fb34992361f4460..059b72514a7fb06dff730a86bee3755b39f6759d 100644 (file)
--- a/src/vulkan/genX_pipeline_util.h
+++ b/src/vulkan/genX_pipeline_util.h
@@ -179,6 +179,57 @@ emit_vertex_input(struct anv_pipeline *pipeline,
 #endif
 }
 
+static inline void
+emit_urb_setup(struct anv_pipeline *pipeline)
+{
+#if ANV_GEN == 7
+   struct anv_device *device = pipeline->device;
+
+   /* From the IVB PRM Vol. 2, Part 1, Section 3.2.1:
+    *
+    *    "A PIPE_CONTROL with Post-Sync Operation set to 1h and a depth stall
+    *    needs to be sent just prior to any 3DSTATE_VS, 3DSTATE_URB_VS,
+    *    3DSTATE_CONSTANT_VS, 3DSTATE_BINDING_TABLE_POINTER_VS,
+    *    3DSTATE_SAMPLER_STATE_POINTER_VS command.  Only one PIPE_CONTROL
+    *    needs to be sent before any combination of VS associated 3DSTATE."
+    */
+   anv_batch_emit(&pipeline->batch, GEN7_PIPE_CONTROL,
+                  .DepthStallEnable = true,
+                  .PostSyncOperation = WriteImmediateData,
+                  .Address = { &device->workaround_bo, 0 });
+#endif
+
+   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PUSH_CONSTANT_ALLOC_VS),
+      .ConstantBufferOffset                     = 0,
+      .ConstantBufferSize                       = 4);
+   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PUSH_CONSTANT_ALLOC_GS),
+      .ConstantBufferOffset                     = 4,
+      .ConstantBufferSize                       = 4);
+   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PUSH_CONSTANT_ALLOC_PS),
+      .ConstantBufferOffset                     = 8,
+      .ConstantBufferSize                       = 4);
+
+   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_VS),
+      .VSURBStartingAddress                     = pipeline->urb.vs_start,
+      .VSURBEntryAllocationSize                 = pipeline->urb.vs_size - 1,
+      .VSNumberofURBEntries                     = pipeline->urb.nr_vs_entries);
+
+   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_GS),
+      .GSURBStartingAddress                     = pipeline->urb.gs_start,
+      .GSURBEntryAllocationSize                 = pipeline->urb.gs_size - 1,
+      .GSNumberofURBEntries                     = pipeline->urb.nr_gs_entries);
+
+   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_HS),
+      .HSURBStartingAddress                     = pipeline->urb.vs_start,
+      .HSURBEntryAllocationSize                 = 0,
+      .HSNumberofURBEntries                     = 0);
+
+   anv_batch_emit(&pipeline->batch, GENX(3DSTATE_URB_DS),
+      .DSURBStartingAddress                     = pipeline->urb.vs_start,
+      .DSURBEntryAllocationSize                 = 0,
+      .DSNumberofURBEntries                     = 0);
+}
+
 static const uint32_t vk_to_gen_cullmode[] = {
    [VK_CULL_MODE_NONE]                       = CULLMODE_NONE,
    [VK_CULL_MODE_FRONT_BIT]                  = CULLMODE_FRONT,