st/vdpau: use linear layout for output surfaces
authorChristian König <christian.koenig@amd.com>
Thu, 14 Jan 2016 12:40:25 +0000 (13:40 +0100)
committerChristian König <christian.koenig@amd.com>
Tue, 29 Mar 2016 15:28:43 +0000 (17:28 +0200)
Works around a bug in radeonsi and tiling is actually
not very beneficial in this use case.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
src/gallium/state_trackers/vdpau/output.c

index 3248f76808d6ffd2596445677574b8d31dcaf868..95f15cb126487eb056af5db4a75c9ff652bba1a5 100644 (file)
@@ -79,7 +79,8 @@ vlVdpOutputSurfaceCreate(VdpDevice device,
    res_tmpl.height0 = height;
    res_tmpl.depth0 = 1;
    res_tmpl.array_size = 1;
-   res_tmpl.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET;
+   res_tmpl.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET |
+                   PIPE_BIND_LINEAR;
    res_tmpl.usage = PIPE_USAGE_DEFAULT;
 
    pipe_mutex_lock(dev->mutex);