add max elwidth resolver on add operation

result now respects the element width of the 2 source operands

diff --git a/riscv/sv.cc b/riscv/sv.cc
index 0012649d0bb5512c23f83d78cea09b19c1e64b57..5cfc4c08c0a9b39b257f424a0703d9650e337760 100644 (file)
--- a/riscv/sv.cc
+++ b/riscv/sv.cc
@@ -12,17 +12,13 @@ int get_bitwidth(uint8_t elwidth, int xlen)
   }
 }
 
-/*
-int to_elwidth(uint8_t bitwidth, int xlen)
+uint8_t maxelwidth(uint8_t wid1, uint8_t wid2)
 {
-  switch (bitwidth) {
-      case xlen: return 0;
-      case 8: return 1;
-      case 16: return 2;
-      default: return 3;
-  }
+    if (wid1 == 0 || wid2 == 0) {
+        return 0;
+    }
+    return std::max(wid1, wid2);
 }
-*/
 
 sv_insn_t::sv_insn_t(processor_t *pr, bool _sv_enabled,
             insn_bits_t bits, unsigned int f, int _xlen,

diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index 3c9fa0551696f595419fabbb85c937c4047ab7e7..3417e69d2f8a1dafacc7049f06c197fb206794f0 100644 (file)
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -363,7 +363,8 @@ sv_reg_t sv_proc_t::rv_add(sv_reg_t const & lhs, sv_reg_t const & rhs)
     } else { // nope: zero-extend.
         result = zext_bwid(result, bitwidth);
     }
-    return sv_reg_t(result, xlen); // XXX TODO: bitwidth
+    uint8_t reswidth = maxelwidth(lhs.get_elwidth(), rhs.get_elwidth());
+    return sv_reg_t(result, xlen, reswidth); // XXX TODO: bitwidth
 }
 
 sv_reg_t sv_proc_t::rv_sub(sv_reg_t const & lhs, sv_reg_t const & rhs)

diff --git a/riscv/sv_reg.h b/riscv/sv_reg.h
index 6908189c71fd41cfcb3f2235daaef52ec0aeced8..5dfcb3505980720f858d1c3e85a0bfd4eccd94f2 100644 (file)
--- a/riscv/sv_reg.h
+++ b/riscv/sv_reg.h
@@ -7,7 +7,7 @@
 #define zext_bwid(x,wid) (((reg_t)(x) << (64-wid)) >> (64-wid))
 
 extern int get_bitwidth(uint8_t elwidth, int xlen);
-//extern int to_elwidth(uint8_t bitwidth, int xlen);
+extern uint8_t maxelwidth(uint8_t bwid1, uint8_t bwid2);
 
 
 class sv_sreg_t;