RISC-V: Fix gas configure support for riscv*-*-*.
authorJim Wilson <jimw@sifive.com>
Fri, 27 Jul 2018 21:35:29 +0000 (14:35 -0700)
committerJim Wilson <jimw@sifive.com>
Fri, 27 Jul 2018 21:35:29 +0000 (14:35 -0700)
gas/
* configure.tgt (riscv*): Accept as alias for riscv32*.

gas/ChangeLog
gas/configure.tgt

index 0cc4e55d2448d52f8d75708a62f133b28504c9fd..c941f99490bd1b4770983b268ce5434c92c53c0d 100644 (file)
@@ -1,3 +1,7 @@
+2018-07-27  Jim Wilson  <jimw@sifive.com>
+
+       * configure.tgt (riscv*): Accept as alias for riscv32*.
+
 2018-07-26  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR gas/23453
index 3d0415c1aa494630e776e94381950c9c02b3576d..6df7dea31ffce364b6c434dc9ae2b0ccd54837f7 100644 (file)
@@ -89,8 +89,8 @@ case ${cpu} in
   pj*)                 cpu_type=pj endian=big ;;
   powerpc*le*)         cpu_type=ppc endian=little ;;
   powerpc*)            cpu_type=ppc endian=big ;;
-  riscv32*)            cpu_type=riscv endian=little arch=riscv32 ;;
   riscv64*)            cpu_type=riscv endian=little arch=riscv64 ;;
+  riscv32* | riscv*)   cpu_type=riscv endian=little arch=riscv32 ;;
   rs6000*)             cpu_type=ppc ;;
   rl78*)               cpu_type=rl78 ;;
   rx)                  cpu_type=rx ;;