radv: disable CPU caching for IBS to reduce fetch latency

AMDGPU_GEM_CREATE_CPU_GTT_USWC should be faster when CPU reads
are unexpected (because they aren't cached).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5959>

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 553ea2dfa83241a7ddca020aba99117c9acffe5c..3ec23fc93a5b2ff90f9750f709cd877aa244c750 100644 (file)
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -530,7 +530,8 @@ cik_create_gfx_config(struct radv_device *device)
                                                     RADEON_DOMAIN_GTT,
                                                     RADEON_FLAG_CPU_ACCESS|
                                                     RADEON_FLAG_NO_INTERPROCESS_SHARING |
-                                                    RADEON_FLAG_READ_ONLY,
+                                                    RADEON_FLAG_READ_ONLY |
+                                                    RADEON_FLAG_GTT_WC,
                                                     RADV_BO_PRIORITY_CS);
        if (!device->gfx_init)
                goto fail;

diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index 23185fd5c437cfac4f8288e5f66e406bbded50d7..15c55a7bf31e8cbfa401f012e8e7078220eabe27 100644 (file)
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -324,7 +324,8 @@ radv_amdgpu_cs_create(struct radeon_winsys *ws,
                                                  RADEON_DOMAIN_GTT,
                                                  RADEON_FLAG_CPU_ACCESS |
                                                  RADEON_FLAG_NO_INTERPROCESS_SHARING |
-                                                 RADEON_FLAG_READ_ONLY,
+                                                 RADEON_FLAG_READ_ONLY |
+                                                 RADEON_FLAG_GTT_WC,
                                                  RADV_BO_PRIORITY_CS);
                if (!cs->ib_buffer) {
                        free(cs);
@@ -440,7 +441,8 @@ static void radv_amdgpu_cs_grow(struct radeon_cmdbuf *_cs, size_t min_size)
                                                   RADEON_DOMAIN_GTT,
                                                   RADEON_FLAG_CPU_ACCESS |
                                                   RADEON_FLAG_NO_INTERPROCESS_SHARING |
-                                                  RADEON_FLAG_READ_ONLY,
+                                                  RADEON_FLAG_READ_ONLY |
+                                                  RADEON_FLAG_GTT_WC,
                                                   RADV_BO_PRIORITY_CS);
 
        if (!cs->ib_buffer) {