re PR target/61561 (arm gcc internal error)
authorMarat Zakirov <m.zakirov@samsung.com>
Fri, 11 Jul 2014 09:02:39 +0000 (09:02 +0000)
committerMarat Zakirov <mzakirov@gcc.gnu.org>
Fri, 11 Jul 2014 09:02:39 +0000 (09:02 +0000)
gcc/
2014-07-11  Marat Zakirov  <m.zakirov@samsung.com>

PR target/61561
* config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer.
(*movhi_bytes): Likewise.
(*arm_movqi_insn): Likewise.

gcc/testsuite/
2014-07-11  Marat Zakirov  <m.zakirov@samsung.com>

PR target/61561
* gcc.dg/pr61561.c: New test.

From-SVN: r212450

gcc/ChangeLog
gcc/config/arm/arm.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/pr61561.c [new file with mode: 0644]

index f9d02b531f79a582bf8540193464d576281cf4ee..87c732ff7ab1c09e8df370b4774fab35f3a500cb 100644 (file)
@@ -1,3 +1,10 @@
+2014-07-11  Marat Zakirov  <m.zakirov@samsung.com>
+
+       PR target/61561
+       * config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer.
+       (*movhi_bytes): Likewise.
+       (*arm_movqi_insn): Likewise. 
+
 2014-07-11  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/56858
index d6ca79a3c2e30164c1015b37347e23605e6bfffa..dac7a0a60569d7577436515c215898d1765c64e4 100644 (file)
 ;; Pattern to recognize insn generated default case above
 (define_insn "*movhi_insn_arch4"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
-       (match_operand:HI 1 "general_operand"      "rI,K,r,mi"))]
+       (match_operand:HI 1 "general_operand"      "rIk,K,r,mi"))]
   "TARGET_ARM
    && arm_arch4
    && (register_operand (operands[0], HImode)
 
 (define_insn "*movhi_bytes"
   [(set (match_operand:HI 0 "s_register_operand" "=r,r,r")
-       (match_operand:HI 1 "arm_rhs_operand"  "I,r,K"))]
+       (match_operand:HI 1 "arm_rhs_operand"  "I,rk,K"))]
   "TARGET_ARM"
   "@
    mov%?\\t%0, %1\\t%@ movhi
 
 (define_insn "*arm_movqi_insn"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,r,l,Uu,r,m")
-       (match_operand:QI 1 "general_operand" "r,r,I,Py,K,Uu,l,m,r"))]
+       (match_operand:QI 1 "general_operand" "rk,rk,I,Py,K,Uu,l,m,r"))]
   "TARGET_32BIT
    && (   register_operand (operands[0], QImode)
        || register_operand (operands[1], QImode))"
index 1fb313a40909e79fc729cfb9b06b1b183acc6e79..63b51c675896d3a66607f14f9d50a998b9ba203d 100644 (file)
@@ -1,3 +1,8 @@
+2014-07-11  Marat Zakirov  <m.zakirov@samsung.com>
+
+       PR target/61561
+       * gcc.dg/pr61561.c: New test.
+
 2014-07-10  Tom de Vries  <tom@codesourcery.com>
 
        * gcc.target/mips/fuse-caller-save.c: Add addressing=absolute to
diff --git a/gcc/testsuite/gcc.dg/pr61561.c b/gcc/testsuite/gcc.dg/pr61561.c
new file mode 100644 (file)
index 0000000..1512f20
--- /dev/null
@@ -0,0 +1,15 @@
+/* PR c/61561.  */
+/* { dg-do assemble } */
+/* { dg-options " -w -O2" } */
+
+int dummy (int a);
+
+char a;
+short b;
+
+void mmm (void)
+{
+  char dyn[dummy (3)];
+  a = (char)&dyn[0];
+  b = (short)&dyn[0];
+}