r600g: initial r600 dual src blending support

survives piglit with no regressions on rv610/evergreen

Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index fc0cec939e2a0e867e9b6afa018bed630e28dd52..15ed04aec64c2fcdc411deb014dbcd02de3260a8 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -27,6 +27,7 @@
 #include "util/u_pack_color.h"
 #include "util/u_memory.h"
 #include "util/u_framebuffer.h"
+#include "util/u_dual_blend.h"
 
 static uint32_t eg_num_banks(uint32_t nbanks)
 {
@@ -709,7 +710,8 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx,
        
        r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
                                color_control, NULL, 0);
-
+       /* only have dual source on MRT0 */
+       blend->dual_src_blend = util_blend_state_is_dual(state, 0);
        for (int i = 0; i < 8; i++) {
                /* state->rt entries > 0 only written if independent blending */
                const int j = state->independent_blend_enable ? i : 0;
@@ -1459,6 +1461,8 @@ static void evergreen_cb(struct r600_context *rctx, struct r600_pipe_state *rsta
        }
        rctx->alpha_ref_dirty = true;
 
+       if (cb == 0)
+           rctx->color0_format = color_info;
 
        offset += r600_resource_va(rctx->context.screen, state->cbufs[cb]->texture);
        offset >>= 8;
@@ -1655,7 +1659,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
 {
        struct r600_context *rctx = (struct r600_context *)ctx;
        struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-       uint32_t shader_mask, tl, br;
+       uint32_t tl, br;
 
        if (rstate == NULL)
                return;
@@ -1677,9 +1681,9 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
                evergreen_db(rctx, rstate, state);
        }
 
-       shader_mask = 0;
+       rctx->fb_cb_shader_mask = 0;
        for (int i = 0; i < state->nr_cbufs; i++) {
-               shader_mask |= 0xf << (i * 4);
+               rctx->fb_cb_shader_mask |= 0xf << (i * 4);
        }
 
        evergreen_get_scissor_rect(rctx, 0, 0, state->width, state->height, &tl, &br);
@@ -1690,8 +1694,6 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
        r600_pipe_state_add_reg(rstate,
                                R_028208_PA_SC_WINDOW_SCISSOR_BR, br,
                                NULL, 0);
-       r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK,
-                               shader_mask, NULL, 0);
 
        free(rctx->states[R600_PIPE_STATE_FRAMEBUFFER]);
        rctx->states[R600_PIPE_STATE_FRAMEBUFFER] = rstate;
@@ -2657,7 +2659,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
                /* always at least export 1 component per pixel */
                exports_ps = 2;
        }
-
+       shader->ps_cb_shader_mask = (1ULL << ((unsigned)num_cout * 4)) - 1;
        if (ninterp == 0) {
                ninterp = 1;
                have_perspective = TRUE;

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 49c79f16ffa3237554449d8b8751bd7d4896f107..a185af257e2cbc874d3d4fb3d8bd6ffa5caa9fa8 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -466,7 +466,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return 7;
 
        case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
-               return 0;
+               return 1;
        }
        return 0;
 }

diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index a84f9cc08229cb576e49fa94ac8478b1612291ad..fafc4364043ab200aac49b9979a751d44ce87c80 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -151,6 +151,7 @@ struct r600_pipe_blend {
        struct r600_pipe_state          rstate;
        unsigned                        cb_target_mask;
        unsigned                        cb_color_control;
+       bool                            dual_src_blend;
 };
 
 struct r600_pipe_dsa {
@@ -181,6 +182,7 @@ struct r600_pipe_shader {
        unsigned        sprite_coord_enable;
        unsigned        flatshade;
        unsigned        pa_cl_vs_out_cntl;
+       unsigned        ps_cb_shader_mask;
        struct pipe_stream_output_info  so;
 };
 
@@ -254,6 +256,8 @@ struct r600_context {
        struct r600_vertex_element      *vertex_elements;
        struct pipe_framebuffer_state   framebuffer;
        unsigned                        cb_target_mask;
+       unsigned                        fb_cb_shader_mask;
+       unsigned                        cb_shader_mask;
        unsigned                        cb_color_control;
        unsigned                        pa_sc_line_stipple;
        unsigned                        pa_cl_clip_cntl;
@@ -346,6 +350,8 @@ struct r600_context {
        void                    *dummy_pixel_shader;
 
        bool                    vertex_buffers_dirty;
+       boolean                 dual_src_blend;
+       unsigned color0_format;
 };
 
 static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom)

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 98e1830fab9f1f45da80875f8a501bd8a28514fd..6290aa55ba18f34722c2ad7f2cb375efbe87a6e4 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -27,6 +27,7 @@
 #include "util/u_pack_color.h"
 #include "util/u_memory.h"
 #include "util/u_framebuffer.h"
+#include "util/u_dual_blend.h"
 
 static uint32_t r600_translate_blend_function(int blend_func)
 {
@@ -717,7 +718,8 @@ static void *r600_create_blend_state(struct pipe_context *ctx,
        }
        blend->cb_target_mask = target_mask;
        blend->cb_color_control = color_control;
-
+       /* only MRT0 has dual src blend */
+       blend->dual_src_blend = util_blend_state_is_dual(state, 0);
        for (int i = 0; i < 8; i++) {
                /* state->rt entries > 0 only written if independent blending */
                const int j = state->independent_blend_enable ? i : 0;
@@ -1509,6 +1511,9 @@ static void r600_cb(struct r600_context *rctx, struct r600_pipe_state *rstate,
                        color_info |= S_0280A0_SOURCE_FORMAT(V_0280A0_EXPORT_NORM);
        }
 
+       if (cb == 0)
+               rctx->color0_format = color_info;
+
        r600_pipe_state_add_reg(rstate,
                                R_028040_CB_COLOR0_BASE + cb * 4,
                                offset >> 8, &rtex->resource, RADEON_USAGE_READWRITE);
@@ -1621,7 +1626,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
 {
        struct r600_context *rctx = (struct r600_context *)ctx;
        struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-       uint32_t shader_mask, tl, br, shader_control;
+       uint32_t tl, br, shader_control;
 
        if (rstate == NULL)
                return;
@@ -1642,11 +1647,11 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
                r600_db(rctx, rstate, state);
        }
 
-       shader_mask = 0;
        shader_control = 0;
+       rctx->fb_cb_shader_mask = 0;
        for (int i = 0; i < state->nr_cbufs; i++) {
-               shader_mask |= 0xf << (i * 4);
                shader_control |= 1 << i;
+               rctx->fb_cb_shader_mask |= 0xf << (i * 4);
        }
        tl = S_028240_TL_X(0) | S_028240_TL_Y(0) | S_028240_WINDOW_OFFSET_DISABLE(1);
        br = S_028244_BR_X(state->width) | S_028244_BR_Y(state->height);
@@ -1660,8 +1665,6 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
 
        r600_pipe_state_add_reg(rstate, R_0287A0_CB_SHADER_CONTROL,
                                shader_control, NULL, 0);
-       r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK,
-                               shader_mask, NULL, 0);
 
        free(rctx->states[R600_PIPE_STATE_FRAMEBUFFER]);
        rctx->states[R600_PIPE_STATE_FRAMEBUFFER] = rstate;
@@ -2294,6 +2297,8 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shad
                exports_ps = 2;
        }
 
+       shader->ps_cb_shader_mask = (1ULL << ((unsigned)num_cout * 4)) - 1;
+
        spi_ps_in_control_0 = S_0286CC_NUM_INTERP(rshader->ninput) |
                                S_0286CC_PERSP_GRADIENT_ENA(1)|
                                S_0286CC_LINEAR_GRADIENT_ENA(need_linear);

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 59336cf56ed8296bf74aa6c3116d1ffa40b3d18b..6d4f3efe253c8190300266459221e3258c1690d5 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -158,11 +158,10 @@ void r600_bind_blend_state(struct pipe_context *ctx, void *state)
        rstate = &blend->rstate;
        rctx->states[rstate->id] = rstate;
        rctx->cb_target_mask = blend->cb_target_mask;
-
        /* Replace every bit except MULTIWRITE_ENABLE. */
        rctx->cb_color_control &= ~C_028808_MULTIWRITE_ENABLE;
        rctx->cb_color_control |= blend->cb_color_control & C_028808_MULTIWRITE_ENABLE;
-
+       rctx->dual_src_blend = blend->dual_src_blend;
        r600_context_pipe_state_set(rctx, rstate);
 }
 
@@ -709,6 +708,10 @@ static void r600_update_derived_state(struct r600_context *rctx)
                r600_context_pipe_state_set(rctx, &rctx->ps_shader->rstate);
        }
 
+       if (rctx->dual_src_blend)
+               rctx->cb_shader_mask = rctx->ps_shader->ps_cb_shader_mask | rctx->fb_cb_shader_mask;
+       else
+               rctx->cb_shader_mask = rctx->fb_cb_shader_mask;
 }
 
 static unsigned r600_conv_prim_to_gs_out(unsigned mode)
@@ -799,6 +802,7 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
                r600_pipe_state_add_reg(&rctx->vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028A6C_VGT_GS_OUT_PRIM_TYPE, 0, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, NULL, 0);
+               r600_pipe_state_add_reg(&rctx->vgt, R_02823C_CB_SHADER_MASK, 0, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028408_VGT_INDX_OFFSET, info.index_bias, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info.restart_index, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info.primitive_restart, NULL, 0);
@@ -808,12 +812,18 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
                        r600_pipe_state_add_reg(&rctx->vgt, R_028808_CB_COLOR_CONTROL, rctx->cb_color_control, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_02881C_PA_CL_VS_OUT_CNTL, 0, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028810_PA_CL_CLIP_CNTL, 0, NULL, 0);
+
+               if (rctx->chip_class <= R700)
+                       r600_pipe_state_add_reg(&rctx->vgt, R_0280A4_CB_COLOR1_INFO, 0, NULL, 0);       
+               else
+                       r600_pipe_state_add_reg(&rctx->vgt, 0x28CAC, 0, NULL, 0);       
        }
 
        rctx->vgt.nregs = 0;
        r600_pipe_state_mod_reg(&rctx->vgt, prim);
        r600_pipe_state_mod_reg(&rctx->vgt, r600_conv_prim_to_gs_out(info.mode));
        r600_pipe_state_mod_reg(&rctx->vgt, rctx->cb_target_mask & mask);
+       r600_pipe_state_mod_reg(&rctx->vgt, rctx->cb_shader_mask);
        r600_pipe_state_mod_reg(&rctx->vgt, info.index_bias);
        r600_pipe_state_mod_reg(&rctx->vgt, info.restart_index);
        r600_pipe_state_mod_reg(&rctx->vgt, info.primitive_restart);
@@ -835,6 +845,11 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
                                 rctx->vs_shader->shader.vs_prohibit_ucps ?
                                 0 : rctx->rasterizer->clip_plane_enable & 0x3F));
 
+       if (rctx->dual_src_blend) {
+               r600_pipe_state_mod_reg(&rctx->vgt, 
+                                       rctx->color0_format);
+       }
+
        r600_context_pipe_state_set(rctx, &rctx->vgt);
 
        /* Emit states (the function expects that we emit at most 17 dwords here). */