Check zero/sign extended hard registers.

2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR middle-end/47725
	* combine.c (cant_combine_insn_p): Check zero/sign extended
	hard registers.

From-SVN: r175218

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index aa9449b737b1e2e99d77cc9af6efc45b4f5782ba..a4b5faf714ce144e8219a7ec20a8d2608bb54925 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2011-06-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR middle-end/47725
+       * combine.c (cant_combine_insn_p): Check zero/sign extended
+       hard registers.
+
 2011-06-20  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
 
        PR target/49385

diff --git a/gcc/combine.c b/gcc/combine.c
index 56fb44eaf42b949fcfe97cee7aadbed50d395aa6..004ae27687d3ce9b4640bbde4201d9a1c3419661 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -2168,6 +2168,12 @@ cant_combine_insn_p (rtx insn)
     return 0;
   src = SET_SRC (set);
   dest = SET_DEST (set);
+  if (GET_CODE (src) == ZERO_EXTEND
+      || GET_CODE (src) == SIGN_EXTEND)
+    src = XEXP (src, 0);
+  if (GET_CODE (dest) == ZERO_EXTEND
+      || GET_CODE (dest) == SIGN_EXTEND)
+    dest = XEXP (dest, 0);
   if (GET_CODE (src) == SUBREG)
     src = SUBREG_REG (src);
   if (GET_CODE (dest) == SUBREG)