[AArch64] PR target/70809: Delete aarch64_vmls<mode> pattern
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Tue, 17 May 2016 12:15:05 +0000 (12:15 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Tue, 17 May 2016 12:15:05 +0000 (12:15 +0000)
PR target/70809
* config/aarch64/aarch64-simd.md (aarch64_vmls<mode>): Delete.

* gcc.target/aarch64/pr70809_1.c: New test.

From-SVN: r236318

gcc/ChangeLog
gcc/config/aarch64/aarch64-simd.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/pr70809_1.c [new file with mode: 0644]

index 0d3e00f42b9622bc10abd519e9d9e55a2b9fc8b1..3c6030d427ad04e871ccc3275f9fd3759235d493 100644 (file)
@@ -1,3 +1,8 @@
+2016-05-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/70809
+       * config/aarch64/aarch64-simd.md (aarch64_vmls<mode>): Delete.
+
 2016-05-17  James Greenhalgh  <james.greenhalgh@arm.com>
 
        * config/aarch64/aarch64-elf.h (ASM_OUTPUT_DEF): Delete.
index bd73bce64414e8bc01732d14311d742cf28f4586..ded8bff0973db17c9e09a801f10315fd59301bb3 100644 (file)
   }
 )
 
-(define_insn "aarch64_vmls<mode>"
-  [(set (match_operand:VDQF 0 "register_operand" "=w")
-       (minus:VDQF (match_operand:VDQF 1 "register_operand" "0")
-                  (mult:VDQF (match_operand:VDQF 2 "register_operand" "w")
-                             (match_operand:VDQF 3 "register_operand" "w"))))]
-  "TARGET_SIMD"
- "fmls\\t%0.<Vtype>, %2.<Vtype>, %3.<Vtype>"
-  [(set_attr "type" "neon_fp_mla_<Vetype>_scalar<q>")]
-)
-
 ;; FP Max/Min
 ;; Max/Min are introduced by idiom recognition by GCC's mid-end.  An
 ;; expression like:
index 1f8a5a60a7829ffe5d7b1ce2f6f8fa763fbcf066..9f75baa32a5547c7f486099105fbcb2e2de8e32a 100644 (file)
@@ -1,3 +1,8 @@
+2016-05-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/70809
+       * gcc.target/aarch64/pr70809_1.c: New test.
+
 2016-05-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * gcc.target/aarch64/cpu-diagnostics-1.c: Skip if -mcpu is overriden.
diff --git a/gcc/testsuite/gcc.target/aarch64/pr70809_1.c b/gcc/testsuite/gcc.target/aarch64/pr70809_1.c
new file mode 100644 (file)
index 0000000..df88c71
--- /dev/null
@@ -0,0 +1,18 @@
+/* PR target/70809.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -ffp-contract=off -mtune=xgene1" } */
+
+/* Check that vector FMLS is not generated when contraction is disabled.  */
+
+void
+foo (float *__restrict__ __attribute__ ((aligned (16))) a,
+     float *__restrict__ __attribute__ ((aligned (16))) x,
+     float *__restrict__ __attribute__ ((aligned (16))) y,
+     float *__restrict__ __attribute__ ((aligned (16))) z)
+{
+  unsigned i = 0;
+  for (i = 0; i < 256; i++)
+    a[i] = x[i] - (y[i] * z[i]);
+}
+
+/* { dg-final { scan-assembler-not "fmls\tv.*" } } */