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diff --git a/openpower/sv/fclass.mdwn b/openpower/sv/fclass.mdwn
index b11862965ff3c144ecc77524e76eb63cb457a0cc..284d5cffea443186bba8454a8d72fc170595af68 100644 (file)
--- a/openpower/sv/fclass.mdwn
+++ b/openpower/sv/fclass.mdwn
@@ -2,7 +2,10 @@
 
 In SV just as with [[sv/fcvt]] single precision is to be considered half-of-elwidth precision.  Thus when elwidth=FP32 fptstsp will test half that precision, at FP16.
 
-based on xvtstdcsp v3.0B p768 the instruction performs analysis of the FP number to determine if it is Infinity, NaN, Denormalised or Zero and if so which sign.  unlike xvtstdcsp the result is stored in a Condition Register specified by BF.
+based on xvtstdcsp v3.0B p768 the instruction performs analysis of the FP number to determine if it is Infinity, NaN, Denormalised or Zero and if so which sign.
+
+unlike xvtstdcsp the result is stored in a Condition Register specified by BF.
+this allows it to be used as a predicate mask.  setb may be used to create the equivalent of xvtstdcsp if desired.
 
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