Added english language description, spaces and brackets for lwaux instruction

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 5ade4063470bb26a4a48a7ed4fdd72c1d7fdbd2d..a4e29c6b8a6ca930eb66d90c1876ff7556598414 100644 (file)
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -471,6 +471,17 @@ Pseudo-code:
     RT <- EXTS(MEM(EA, 4))
     RA <- EA
 
+Description:
+
+    Let the effective address (EA) be the sum (RA)+ (RB).
+    The word in storage addressed by EA is loaded into
+    RT[32:63]. RT[0:31] are filled with a copy of bit 0 of the
+    loaded word.
+
+    EA is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None