r600g,radeonsi: separate cache flush flags
authorMarek Olšák <marek.olsak@amd.com>
Mon, 29 Dec 2014 12:39:42 +0000 (13:39 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 7 Jan 2015 11:06:43 +0000 (12:06 +0100)
I will rename them for radeonsi.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/r600/r600_pipe.h
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeonsi/si_descriptors.c
src/gallium/drivers/radeonsi/si_pipe.h
src/gallium/drivers/radeonsi/si_state_draw.c

index 46b0a2de07d010a0c2321bc8f0cd0aececd04143..e110efe7aea6b6477a65497dad8fa6e86e5ce2fd 100644 (file)
 
 #define R600_NUM_ATOMS 73
 
+/* read caches */
+#define R600_CONTEXT_INV_VERTEX_CACHE          (R600_CONTEXT_PRIVATE_FLAG << 0)
+#define R600_CONTEXT_INV_TEX_CACHE             (R600_CONTEXT_PRIVATE_FLAG << 1)
+#define R600_CONTEXT_INV_CONST_CACHE           (R600_CONTEXT_PRIVATE_FLAG << 2)
+/* read-write caches */
+#define R600_CONTEXT_FLUSH_AND_INV             (R600_CONTEXT_PRIVATE_FLAG << 3)
+#define R600_CONTEXT_FLUSH_AND_INV_CB_META     (R600_CONTEXT_PRIVATE_FLAG << 4)
+#define R600_CONTEXT_FLUSH_AND_INV_DB_META     (R600_CONTEXT_PRIVATE_FLAG << 5)
+#define R600_CONTEXT_FLUSH_AND_INV_DB          (R600_CONTEXT_PRIVATE_FLAG << 6)
+#define R600_CONTEXT_FLUSH_AND_INV_CB          (R600_CONTEXT_PRIVATE_FLAG << 7)
+/* engine synchronization */
+#define R600_CONTEXT_PS_PARTIAL_FLUSH          (R600_CONTEXT_PRIVATE_FLAG << 8)
+#define R600_CONTEXT_WAIT_3D_IDLE              (R600_CONTEXT_PRIVATE_FLAG << 9)
+#define R600_CONTEXT_WAIT_CP_DMA_IDLE          (R600_CONTEXT_PRIVATE_FLAG << 10)
+
 /* the number of CS dwords for flushing and drawing */
 #define R600_MAX_FLUSH_CS_DWORDS       16
 #define R600_MAX_DRAW_CS_DWORDS                40
index a699f45f421b67ac76e13c6edf90dce4c6e1e99f..15736d7b1c9f627656aa2f69fa073685c6aeacc3 100644 (file)
 #define R600_QUERY_VRAM_USAGE          (PIPE_QUERY_DRIVER_SPECIFIC + 6)
 #define R600_QUERY_GTT_USAGE           (PIPE_QUERY_DRIVER_SPECIFIC + 7)
 
-/* read caches */
-#define R600_CONTEXT_INV_VERTEX_CACHE          (1 << 0)
-#define R600_CONTEXT_INV_TEX_CACHE             (1 << 1)
-#define R600_CONTEXT_INV_CONST_CACHE           (1 << 2)
-#define R600_CONTEXT_INV_SHADER_CACHE          (1 << 3)
-/* read-write caches */
-#define R600_CONTEXT_STREAMOUT_FLUSH           (1 << 8)
-#define R600_CONTEXT_FLUSH_AND_INV             (1 << 9)
-#define R600_CONTEXT_FLUSH_AND_INV_CB_META     (1 << 10)
-#define R600_CONTEXT_FLUSH_AND_INV_DB_META     (1 << 11)
-#define R600_CONTEXT_FLUSH_AND_INV_DB          (1 << 12)
-#define R600_CONTEXT_FLUSH_AND_INV_CB          (1 << 13)
-#define R600_CONTEXT_FLUSH_WITH_INV_L2         (1 << 14)
-/* engine synchronization */
-#define R600_CONTEXT_PS_PARTIAL_FLUSH          (1 << 16)
-#define R600_CONTEXT_WAIT_3D_IDLE              (1 << 17)
-#define R600_CONTEXT_WAIT_CP_DMA_IDLE          (1 << 18)
-#define R600_CONTEXT_VGT_FLUSH                 (1 << 19)
-#define R600_CONTEXT_VGT_STREAMOUT_SYNC                (1 << 20)
-#define R600_CONTEXT_CS_PARTIAL_FLUSH          (1 << 21)
-/* other flags */
-#define R600_CONTEXT_FLAG_COMPUTE              (1u << 31)
+#define R600_CONTEXT_STREAMOUT_FLUSH           (1u << 0)
+#define R600_CONTEXT_PRIVATE_FLAG              (1u << 1)
 
 /* special primitive types */
 #define R600_PRIM_RECTANGLE_LIST       PIPE_PRIM_MAX
index cb1ce5668a3bd5dcb9815d7f1ef2da5911554872..cd8fd4f4b61b4e7343431ff3a75db0141cc72f9b 100644 (file)
@@ -1086,7 +1086,7 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
                         R600_CONTEXT_FLUSH_AND_INV_DB |
                         R600_CONTEXT_FLUSH_AND_INV_CB_META |
                         R600_CONTEXT_FLUSH_AND_INV_DB_META;
-       sctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE;
+       sctx->b.flags |= R600_CONTEXT_PS_PARTIAL_FLUSH;
 
        while (size) {
                unsigned byte_count = MIN2(size, CP_DMA_MAX_BYTE_COUNT);
@@ -1152,7 +1152,7 @@ void si_copy_buffer(struct si_context *sctx,
                         R600_CONTEXT_FLUSH_AND_INV_DB |
                         R600_CONTEXT_FLUSH_AND_INV_CB_META |
                         R600_CONTEXT_FLUSH_AND_INV_DB_META |
-                        R600_CONTEXT_WAIT_3D_IDLE;
+                        R600_CONTEXT_PS_PARTIAL_FLUSH;
 
        while (size) {
                unsigned sync_flags = 0;
index 5f5001cfade3c1d61159a1c1f39a25c7c9406092..7053d59a14cef556618f9ef1c722bdec6ec6de89 100644 (file)
 #define SI_MAX_DRAW_CS_DWORDS \
        (/*derived prim state:*/ 6 + /*draw regs:*/ 16 + /*draw packets:*/ 31)
 
+/* read caches */
+#define R600_CONTEXT_INV_TEX_CACHE             (R600_CONTEXT_PRIVATE_FLAG << 0)
+#define R600_CONTEXT_INV_CONST_CACHE           (R600_CONTEXT_PRIVATE_FLAG << 1)
+#define R600_CONTEXT_INV_SHADER_CACHE          (R600_CONTEXT_PRIVATE_FLAG << 2)
+/* read-write caches */
+#define R600_CONTEXT_FLUSH_AND_INV             (R600_CONTEXT_PRIVATE_FLAG << 3)
+#define R600_CONTEXT_FLUSH_AND_INV_CB_META     (R600_CONTEXT_PRIVATE_FLAG << 4)
+#define R600_CONTEXT_FLUSH_AND_INV_DB_META     (R600_CONTEXT_PRIVATE_FLAG << 5)
+#define R600_CONTEXT_FLUSH_AND_INV_DB          (R600_CONTEXT_PRIVATE_FLAG << 6)
+#define R600_CONTEXT_FLUSH_AND_INV_CB          (R600_CONTEXT_PRIVATE_FLAG << 7)
+#define R600_CONTEXT_FLUSH_WITH_INV_L2         (R600_CONTEXT_PRIVATE_FLAG << 8)
+/* engine synchronization */
+#define R600_CONTEXT_PS_PARTIAL_FLUSH          (R600_CONTEXT_PRIVATE_FLAG << 9)
+#define R600_CONTEXT_CS_PARTIAL_FLUSH          (R600_CONTEXT_PRIVATE_FLAG << 10)
+#define R600_CONTEXT_VGT_FLUSH                 (R600_CONTEXT_PRIVATE_FLAG << 11)
+#define R600_CONTEXT_VGT_STREAMOUT_SYNC                (R600_CONTEXT_PRIVATE_FLAG << 12)
+/* other flags */
+#define R600_CONTEXT_FLAG_COMPUTE              (R600_CONTEXT_PRIVATE_FLAG << 13)
+
 struct si_compute;
 
 struct si_screen {
index f3d58c3e2ab0e23880709a24590649a2f4bf1e8c..48da7f8821016b9570f4bf33a4209793204af5ed 100644 (file)
@@ -432,8 +432,7 @@ void si_emit_cache_flush(struct r600_common_context *sctx, struct r600_atom *ato
                                EVENT_WRITE_INV_L2);
         }
 
-       if (sctx->flags & (R600_CONTEXT_WAIT_3D_IDLE |
-                          R600_CONTEXT_PS_PARTIAL_FLUSH)) {
+       if (sctx->flags & R600_CONTEXT_PS_PARTIAL_FLUSH) {
                radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0) | compute);
                radeon_emit(cs, EVENT_TYPE(V_028A90_PS_PARTIAL_FLUSH) | EVENT_INDEX(4));
        } else if (sctx->flags & R600_CONTEXT_STREAMOUT_FLUSH) {