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Merge pull request #2368 from YosysHQ/verific_portrange
author
clairexen
<claire@symbioticeda.com>
Mon, 31 Aug 2020 09:58:29 +0000
(11:58 +0200)
committer
GitHub
<noreply@github.com>
Mon, 31 Aug 2020 09:58:29 +0000
(11:58 +0200)
Fix import of VHDL enums
Trivial merge