re PR target/64180 (PowerPC carry bit improvements)

	PR target/64180
	* config/rs6000/rs6000.md (*add<mode>3_internal1): Remove addic
	alternative.

From-SVN: r218592

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 63479fb6adf0826ddd4c3dbf10efea93cea7a56d..42afb65c7193a1c4677346556cc62daadd0f0a31 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-12-10  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR target/64180
+       * config/rs6000/rs6000.md (*add<mode>3_internal1): Remove addic
+       alternative.
+
 2014-12-10  Segher Boessenkool  <segher@kernel.crashing.org>
 
        PR target/64180

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index c11c31a2f2da42482cf50b69c5ea7f1c71352707..7a7475583a5075d52b5426d3871f2eae4f436ec0 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1491,17 +1491,14 @@
     }
 })
 
-;; Discourage ai/addic because of carry but provide it in an alternative
-;; allowing register zero as source.
 (define_insn "*add<mode>3_internal1"
-  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,?r,r")
-       (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,r,b")
-                 (match_operand:GPR 2 "add_operand" "r,I,I,L")))]
+  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r,r")
+       (plus:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,b,b")
+                 (match_operand:GPR 2 "add_operand" "r,I,L")))]
   "!DECIMAL_FLOAT_MODE_P (GET_MODE (operands[0])) && !DECIMAL_FLOAT_MODE_P (GET_MODE (operands[1]))"
   "@
    add %0,%1,%2
    addi %0,%1,%2
-   addic %0,%1,%2
    addis %0,%1,%v2"
   [(set_attr "type" "add")])