ilo: reset SO write offsets for new SO targets

When the SO targets are changed and no appending is requested, we need to send
SOL_RESET on GEN7+.

diff --git a/src/gallium/drivers/ilo/ilo_3d_pipeline.c b/src/gallium/drivers/ilo/ilo_3d_pipeline.c
index a94310f0e6420a0d515ce63774a60d94a746dbd7..bbdf180d66edfef3a7828159f38529ea3d807e18 100644 (file)
--- a/src/gallium/drivers/ilo/ilo_3d_pipeline.c
+++ b/src/gallium/drivers/ilo/ilo_3d_pipeline.c
@@ -219,16 +219,25 @@ ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
                           const struct pipe_draw_info *info,
                           int *prim_generated, int *prim_emitted)
 {
+   const bool so_enabled = (ilo->stream_output_targets.num_targets > 0);
    bool success;
 
-   /*
-    * We keep track of the SVBI in the driver, so that we can restore it when
-    * the HW context is invalidated (by another process).  The value needs to
-    * be reset when the stream output targets are changed.
-    */
-   if (ilo->dirty & ILO_DIRTY_STREAM_OUTPUT_TARGETS)
+   if (ilo->dirty & ILO_DIRTY_STREAM_OUTPUT_TARGETS &&
+       so_enabled && !ilo->stream_output_targets.append_bitmask) {
+      /*
+       * We keep track of the SVBI in the driver, so that we can restore it
+       * when the HW context is invalidated (by another process).  The value
+       * needs to be reset when stream output is enabled and the targets are
+       * changed.
+       */
       p->state.so_num_vertices = 0;
 
+      /* on GEN7+, we need SOL_RESET to reset the SO write offsets */
+      if (p->dev->gen >= ILO_GEN(7))
+         ilo_cp_set_one_off_flags(p->cp, INTEL_EXEC_GEN7_SOL_RESET);
+   }
+
+
    while (true) {
       struct ilo_cp_jmp_buf jmp;
       int err;