radv: pass queue index into winsys submission
authorDave Airlie <airlied@redhat.com>
Thu, 1 Dec 2016 01:14:49 +0000 (01:14 +0000)
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Sun, 18 Dec 2016 19:52:26 +0000 (20:52 +0100)
This is so we can submit on separate queues if needed

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_device.c
src/amd/vulkan/radv_radeon_winsys.h
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c

index cc89387ff70527f201901373041f21e9da6e4d7c..fd0ef720d8b2172722d5b46f1c9b8eae1161f7d4 100644 (file)
@@ -855,7 +855,7 @@ VkResult radv_QueueSubmit(
                        if ((cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_SIMULTANEOUS_USE_BIT))
                                can_patch = false;
                }
-               ret = queue->device->ws->cs_submit(ctx, cs_array,
+               ret = queue->device->ws->cs_submit(ctx, queue->queue_idx, cs_array,
                                                   pSubmits[i].commandBufferCount,
                                                   can_patch, base_fence);
                if (ret)
@@ -865,7 +865,7 @@ VkResult radv_QueueSubmit(
 
        if (fence) {
                if (!submitCount)
-                       ret = queue->device->ws->cs_submit(ctx, &queue->device->empty_cs,
+                       ret = queue->device->ws->cs_submit(ctx, queue->queue_idx, &queue->device->empty_cs,
                                                           1, false, base_fence);
 
                fence->submitted = true;
index f29071be941b692f91d8a0523bff3333f9048027..38cb4408ff479059129536b3f6d121bec76cfe7f 100644 (file)
@@ -301,6 +301,7 @@ struct radeon_winsys {
        void (*cs_grow)(struct radeon_winsys_cs * cs, size_t min_size);
 
        int (*cs_submit)(struct radeon_winsys_ctx *ctx,
+                        int queue_index,
                         struct radeon_winsys_cs **cs_array,
                         unsigned cs_count,
                         bool can_patch,
index fc02d4926396f7209d2697f5f10097bb7acb57a7..7337918680f3b7139b7ff9cb484581b68f861e7a 100644 (file)
@@ -510,6 +510,7 @@ static void radv_assign_last_submit(struct radv_amdgpu_ctx *ctx,
 }
 
 static int radv_amdgpu_winsys_cs_submit_chained(struct radeon_winsys_ctx *_ctx,
+                                               int queue_idx,
                                                struct radeon_winsys_cs **cs_array,
                                                unsigned cs_count,
                                                struct radeon_winsys_fence *_fence)
@@ -550,6 +551,7 @@ static int radv_amdgpu_winsys_cs_submit_chained(struct radeon_winsys_ctx *_ctx,
        }
 
        request.ip_type = cs0->hw_ip;
+       request.ring = queue_idx;
        request.number_of_ibs = 1;
        request.ibs = &cs0->ib;
        request.resources = bo_list;
@@ -574,6 +576,7 @@ static int radv_amdgpu_winsys_cs_submit_chained(struct radeon_winsys_ctx *_ctx,
 }
 
 static int radv_amdgpu_winsys_cs_submit_fallback(struct radeon_winsys_ctx *_ctx,
+                                                int queue_idx,
                                                 struct radeon_winsys_cs **cs_array,
                                                 unsigned cs_count,
                                                 struct radeon_winsys_fence *_fence)
@@ -600,6 +603,7 @@ static int radv_amdgpu_winsys_cs_submit_fallback(struct radeon_winsys_ctx *_ctx,
                }
 
                request.ip_type = cs0->hw_ip;
+               request.ring = queue_idx;
                request.resources = bo_list;
                request.number_of_ibs = cnt;
                request.ibs = ibs;
@@ -639,6 +643,7 @@ static int radv_amdgpu_winsys_cs_submit_fallback(struct radeon_winsys_ctx *_ctx,
 }
 
 static int radv_amdgpu_winsys_cs_submit_sysmem(struct radeon_winsys_ctx *_ctx,
+                                              int queue_idx,
                                               struct radeon_winsys_cs **cs_array,
                                               unsigned cs_count,
                                               struct radeon_winsys_fence *_fence)
@@ -700,6 +705,7 @@ static int radv_amdgpu_winsys_cs_submit_sysmem(struct radeon_winsys_ctx *_ctx,
                ib.ib_mc_address = ws->buffer_get_va(bo);
 
                request.ip_type = cs0->hw_ip;
+               request.ring = queue_idx;
                request.resources = bo_list;
                request.number_of_ibs = 1;
                request.ibs = &ib;
@@ -730,6 +736,7 @@ static int radv_amdgpu_winsys_cs_submit_sysmem(struct radeon_winsys_ctx *_ctx,
 }
 
 static int radv_amdgpu_winsys_cs_submit(struct radeon_winsys_ctx *_ctx,
+                                       int queue_idx,
                                        struct radeon_winsys_cs **cs_array,
                                        unsigned cs_count,
                                        bool can_patch,
@@ -737,13 +744,13 @@ static int radv_amdgpu_winsys_cs_submit(struct radeon_winsys_ctx *_ctx,
 {
        struct radv_amdgpu_cs *cs = radv_amdgpu_cs(cs_array[0]);
        if (!cs->ws->use_ib_bos) {
-               return radv_amdgpu_winsys_cs_submit_sysmem(_ctx, cs_array,
+               return radv_amdgpu_winsys_cs_submit_sysmem(_ctx, queue_idx, cs_array,
                                                           cs_count, _fence);
        } else if (can_patch && cs_count > AMDGPU_CS_MAX_IBS_PER_SUBMIT && false) {
-               return radv_amdgpu_winsys_cs_submit_chained(_ctx, cs_array,
+               return radv_amdgpu_winsys_cs_submit_chained(_ctx, queue_idx, cs_array,
                                                            cs_count, _fence);
        } else {
-               return radv_amdgpu_winsys_cs_submit_fallback(_ctx, cs_array,
+               return radv_amdgpu_winsys_cs_submit_fallback(_ctx, queue_idx, cs_array,
                                                             cs_count, _fence);
        }
 }