(no commit message)

diff --git a/HDL_workflow/ECP5_FPGA.mdwn b/HDL_workflow/ECP5_FPGA.mdwn
index fa61e6da173f758becb15f4e9a140a6557b82208..ae8d70bd4837f15869c3df90f88d13066686b50b 100644 (file)
--- a/HDL_workflow/ECP5_FPGA.mdwn
+++ b/HDL_workflow/ECP5_FPGA.mdwn
@@ -163,8 +163,9 @@ Board pin # (count) | Board pin label # | FPGA IO PAD | GPIO # (n/p) |   Label
 
 As noted in the schematic pins GP,GN 0-7 are single ended non-differential pairs, whereas pins GP,GN 8-13 I haven't mapped out here as they are bidirectional differential pairs.
 
+ft232 pin and wire colour table converted to jtag signal names:
 
-``` ft232 pin and wire colour table converted to jtag signal names
+```
  _________________________
 | Pin # | Name |  Colour  |
 |-------|------|----------|