bug 1055: update pseudocode/description for FP store shifted

diff --git a/openpower/isa/fpstoreshift.mdwn b/openpower/isa/fpstoreshift.mdwn
index 16bce78c2e64f6e3bf11395a5427038192d5563a..648d076aa657fbaf9594cc4ae9f505ed1c56fa6a 100644 (file)
--- a/openpower/isa/fpstoreshift.mdwn
+++ b/openpower/isa/fpstoreshift.mdwn
@@ -1,42 +1,20 @@
 <!-- TODO DRAFT Floating-point Shifted store instructions. -->
 
-# Store Floating-Point Single
-
-D-Form
-
-* stfs FRS,D(RA)
-
-Pseudo-code:
-
-    EA <- (RA|0) + EXTS(D)
-    MEM(EA, 4)<- SINGLE( (FRS) )
-
-Description:
-
-    Let the effective address (EA) be the sum (RA|0)+D.
-
-    The contents of register FRS are converted to single
-    format (see page 142) and stored into the word in stor-
-    age addressed by EA.
-
-Special Registers Altered:
-
-    None
-
-# Store Floating-Point Single Indexed
+# Store Floating-Point Single Indexed Shifted
 
 X-Form
 
-* stfsx FRS,RA,RB
+* stfsx FRS,RA,RB,SH
 
 Pseudo-code:
 
-    EA <- (RA|0) + (RB)
+    EA <- (RA|0) + (RB)>>(SH+1)
     MEM(EA, 4)<- SINGLE( (FRS) )
 
 Description:
 
-    Let the effective address (EA) be the sum (RA|0)+(RB).
+    Let the effective address (EA) be the sum of (RA|0) with
+    the contents of register RB shifted by (SH+1).
 
     The contents of register FRS are converted to single
     format (see page 142) and stored into the word in stor-
@@ -46,49 +24,22 @@ Special Registers Altered:
 
     None
 
-# Store Floating-Point Single with Update
-
-D-Form
-
-* stfsu FRS,D(RA)
-
-Pseudo-code:
-
-    EA <- (RA) + EXTS(D)
-    MEM(EA, 4)<- SINGLE( (FRS) )
-    RA <- EA
-
-Description:
-
-    Let the effective address (EA) be the sum (RA) +D.
-
-    The contents of register FRS are converted to single
-    format (see page 142) and stored into the word in stor-
-    age addressed by EA.
-
-    EA is placed into register RA.
-
-    If RA=0, the instruction form is invalid.
-
-Special Registers Altered:
-
-    None
-
-# Store Floating-Point Single with Update Indexed
+# Store Floating-Point Single with Update Indexed Shifted
 
 X-Form
 
-* stfsux FRS,RA,RB
+* stfsux FRS,RA,RB,SH
 
 Pseudo-code:
 
-    EA <- (RA) + (RB)
+    EA <- (RA) + (RB)>>(SH+1)
     MEM(EA, 4)<- SINGLE( (FRS) )
     RA <- EA
 
 Description:
 
-    Let the effective address (EA) be the sum (RA) +(RB).
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and the contents of register RA.
 
     The contents of register FRS are converted to single
     format (see page 142) and stored into the word in stor-
@@ -102,42 +53,22 @@ Special Registers Altered:
 
     None
 
-# Store Floating-Point Double
-
-D-Form
-
-* stfd FRS,D(RA)
-
-Pseudo-code:
-
-    EA <- (RA|0) + EXTS(D)
-    MEM(EA, 8)<- (FRS) 
-
-Description:
-
-    Let the effective address (EA) be the sum (RA|0)+D.
-
-    The contents of register FRS are stored into the dou-
-    bleword in storage addressed by EA.
-
-Special Registers Altered:
-
-    None
-
-# Store Floating-Point Double Indexed
+# Store Floating-Point Double Indexed Shifted
 
 X-Form
 
-* stfdx FRS,RA,RB
+* stfdx FRS,RA,RB,SH
 
 Pseudo-code:
 
-    EA <- (RA|0) + (RB)
+    EA <- (RA|0) + (RB)>>(SH+1)
     MEM(EA, 8)<- (FRS) 
 
 Description:
 
     Let the effective address (EA) be the sum (RA|0)+(RB).
+    Let the effective address (EA) be the sum of (RA|0) with
+    the contents of register RB shifted by (SH+1).
 
     The contents of register FRS are stored into the dou-
     bleword in storage addressed by EA.
@@ -146,48 +77,22 @@ Special Registers Altered:
 
     None
 
-# Store Floating-Point Double with Update
-
-D-Form
-
-* stfdu FRS,D(RA)
-
-Pseudo-code:
-
-    EA <- (RA) + EXTS(D)
-    MEM(EA, 8)<- (FRS) 
-    RA <- EA
-
-Description:
-
-    Let the effective address (EA) be the sum (RA)+D.
-
-    The contents of register FRS are stored into the dou-
-    bleword in storage addressed by EA.
-
-    EA is placed into register RA.
-
-    If RA=0, the instruction form is invalid.
-
-Special Registers Altered:
-
-    None
-
-# Store Floating-Point Double with Update Indexed
+# Store Floating-Point Double with Update Indexed Shifted
 
 X-Form
 
-* stfdux FRS,RA,RB
+* stfdux FRS,RA,RB,SH
 
 Pseudo-code:
 
-    EA <- (RA) + (RB)
+    EA <- (RA) + (RB)>>(SH+1)
     MEM(EA, 8)<- (FRS) 
     RA <- EA
 
 Description:
 
-    Let the effective address (EA) be the sum (RA)+(RB).
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and the contents of register RA.
 
     The contents of register FRS are stored into the dou-
     bleword in storage addressed by EA.
@@ -200,21 +105,21 @@ Special Registers Altered:
 
     None
 
-# Store Floating-Point as Integer Word Indexed 
+# Store Floating-Point as Integer Word Indexed Shifted
 
 X-Form
 
-* stfiwx FRS,RA,RB
+* stfiwx FRS,RA,RB,SH
 
 Pseudo-code:
 
-    b <- (RA|0)
-    EA <- b + (RB)
+    EA <- (RA|0) + (RB)>>(SH+1)
     MEM(EA, 8)<- (FRS)[32:63]
 
 Description:
 
-    Let the effective address (EA) be the sum (RA|0)+(RB).
+    Let the effective address (EA) be the sum of (RA|0) with
+    the contents of register RB shifted by (SH+1).
 
     (FRS)[32:63] are stored, without conversion, into the word
     in storage addressed by EA.