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diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index 6ad8f0a8f03b1dadc38c252f8f8bf5f37c18235d..d403cf02b58a41aae541594aad52c80ef7c2d3d7 100644 (file)
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -133,6 +133,8 @@ Thus for example, a User Mode trap will end up swapping STATE and ueSTATE (on bo
 
 Likewise, Supervisor Mode may perform context-switches, safe in the knowledge that its Vectorisation State is unaffected by User Mode.
 
+For this to work, the (x)eSTATE CSR must be saved onto the stack by the trap, just like (x)epc, before modifying the trap atomicity flag (x)ie.
+
 The access pattern for these groups of CSRs in each mode follows the
 same pattern for other CSRs that have M-Mode and S-Mode "mirrors":