| 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111
```
-## Suitable for svp64-only
-
-This is the same table containing v3.0B Primary Opcodes except those that
-make no sense in a Vectorisation Context have been removed. These removed
-POs can, *in the SV Vector Context only*, be assigned to alternative
-(Vectorised-only) instructions, including future extensions.
-EXT04 retains the scalar `madd*` operations but would have all PackedSIMD
-(aka VSX) operations removed.
-
-Note, again, to emphasise: outside of svp64 these opcodes **do not**
-change. When not prefixed with svp64 these opcodes **specifically**
-retain their v3.0B / v3.1B OpenPOWER Standard compliant meaning.
-
-```
- | 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111
-000 | | | | | EXT04 | | | mulli | 000
-001 | subfic | | cmpli | cmpi | addic | addic. | addi | addis | 001
-010 | bc/l/a | | | EXT19 | rlwimi| rlwinm | | rlwnm | 010
-011 | ori | oris | xori | xoris | andi. | andis. | EXT30 | EXT31 | 011
-100 | lwz | lwzu | lbz | lbzu | stw | stwu | stb | stbu | 100
-101 | lhz | lhzu | lha | lhau | sth | sthu | | | 101
-110 | lfs | lfsu | lfd | lfdu | stfs | stfsu | stfd | stfdu | 110
-111 | | | EXT58 | EXT59 | | EXT61 | | EXT63 | 111
- | 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111
-```
-
It is important to note that having a different v3.0B Scalar opcode
that is different from an SVP64 one is highly undesirable: the complexity
-in the decoder is greatly increased.
+in the decoder is greatly increased, through breaking of the RISC paradigm.
# EXTRA Field Mapping