arch-arm: Remove unnecessary haveGICv3CPUInterface

This is not needed since the ISA class could just check if
the gicv3CpuInterface ptr is different than nullptr

Change-Id: I6d562a5d9ff2568774b6958f03f04d878266ca8f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27711
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 2cc0f950c14e4ea2ce6535b46b3c10721493bb13..a3e0ce6c2b32a1df3a39c6ec5d0f392af67d7146 100644 (file)
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -60,7 +60,7 @@ namespace ArmISA
 
 ISA::ISA(Params *p) : BaseISA(p), system(NULL),
     _decoderFlavor(p->decoderFlavor), _vecRegRenameMode(Enums::Full),
-    pmu(p->pmu), haveGICv3CPUInterface(false), impdefAsNop(p->impdef_nop),
+    pmu(p->pmu), impdefAsNop(p->impdef_nop),
     afterStartup(false)
 {
     miscRegs[MISCREG_SCTLR_RST] = 0;
@@ -428,7 +428,6 @@ ISA::startup(ThreadContext *tc)
     if (system) {
         Gicv3 *gicv3 = dynamic_cast<Gicv3 *>(system->getGIC());
         if (gicv3) {
-            haveGICv3CPUInterface = true;
             gicv3CpuInterface.reset(gicv3->getCPUInterface(tc->contextId()));
             gicv3CpuInterface->setISA(this);
             gicv3CpuInterface->setThreadContext(tc);
@@ -744,7 +743,7 @@ ISA::readMiscReg(int misc_reg, ThreadContext *tc)
                (haveVirtualization    ? 0x0000000000000200 : 0) | // EL2
                (haveSecurity          ? 0x0000000000002000 : 0) | // EL3
                (haveSVE               ? 0x0000000100000000 : 0) | // SVE
-               (haveGICv3CPUInterface ? 0x0000000001000000 : 0);
+               (gicv3CpuInterface     ? 0x0000000001000000 : 0);
       case MISCREG_ID_AA64PFR1_EL1:
         return 0; // bits [63:0] RES0 (reserved for future use)
 

diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index 736c395a762a30292a99ab6cf0879b9feac347ec..8f2e0d26b4f3cad7a70718a22c4286f4148a51a6 100644 (file)
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -91,7 +91,6 @@ namespace ArmISA
         bool haveVirtualization;
         bool haveCrypto;
         bool haveLargeAsid64;
-        bool haveGICv3CPUInterface;
         uint8_t physAddrRange;
         bool haveSVE;
         bool haveLSE;
@@ -746,14 +745,14 @@ namespace ArmISA
 
         Enums::DecoderFlavor decoderFlavor() const { return _decoderFlavor; }
 
-        /** Getter for haveGICv3CPUInterface */
+        /** Returns true if the ISA has a GICv3 cpu interface */
         bool haveGICv3CpuIfc() const
         {
-            // haveGICv3CPUInterface is initialized at startup time, hence
+            // gicv3CpuInterface is initialized at startup time, hence
             // trying to read its value before the startup stage will lead
             // to an error
             assert(afterStartup);
-            return haveGICv3CPUInterface;
+            return gicv3CpuInterface != nullptr;
         }
 
         Enums::VecRegRenameMode