if (flags & DISASSEMBLY_RAW_INSN)
{
- CORE_ADDR end_pc;
- bfd_byte data;
- const char *spacer = "";
-
/* Build the opcodes using a temporary stream so we can
write them out in a single go for the MI. */
m_opcode_stb.clear ();
- end_pc = pc + size;
+ /* Read the instruction opcode data. */
+ m_opcode_data.resize (size);
+ read_code (pc, m_opcode_data.data (), size);
- for (;pc < end_pc; ++pc)
+ for (int i = 0; i < size; ++i)
{
- read_code (pc, &data, 1);
- m_opcode_stb.printf ("%s%02x", spacer, (unsigned) data);
- spacer = " ";
+ if (i > 0)
+ m_opcode_stb.puts (" ");
+ m_opcode_stb.printf ("%02x", (unsigned) m_opcode_data[i]);
}
m_uiout->field_stream ("opcodes", m_opcode_stb);
/* The buffer used to build the raw opcodes string. */
string_file m_opcode_stb;
+
+ /* The buffer used to hold the opcode bytes (if required). */
+ gdb::byte_vector m_opcode_data;
};
/* Return the length in bytes of the instruction at address MEMADDR in