out << endl;
}
- vector<int64_t> perProcCycleCount(m_num_of_sequencers);
-
- for (int i = 0; i < m_num_of_sequencers; i++) {
- perProcCycleCount[i] =
- g_system_ptr->curCycle() - m_cycles_executed_at_start[i] + 1;
- // The +1 allows us to avoid division by zero
- }
-
- out << "ruby_cycles_executed: " << perProcCycleCount << endl;
-
- out << endl;
-
if (!short_stats) {
out << "Busy Controller Counts:" << endl;
for (uint32_t i = 0; i < MachineType_NUM; i++) {
printRequestProfile(out);
- out << "filter_action: " << m_filter_action_histogram << endl;
-
if (!m_all_instructions) {
m_address_profiler_ptr->printStats(out);
}
m_ruby_start = g_system_ptr->curCycle();
m_real_time_start_time = time(NULL);
- m_cycles_executed_at_start.resize(m_num_of_sequencers);
- for (int i = 0; i < m_num_of_sequencers; i++) {
- m_cycles_executed_at_start[i] = g_system_ptr->curCycle();
- }
-
m_busyBankCount = 0;
m_missLatencyHistograms.resize(RubyRequestType_NUM);
}
}
-void
-Profiler::profilePFWait(Cycles waitTime)
-{
- m_prefetchWaitHistogram.add(waitTime);
-}
-
void
Profiler::bankBusy()
{
m_average_latency_estimate.add(latency);
}
- void recordPrediction(bool wasGood, bool wasPredicted);
-
- void startTransaction(int cpu);
- void endTransaction(int cpu);
- void profilePFWait(Cycles waitTime);
-
void controllerBusy(MachineID machID);
void bankBusy();
AddressProfiler* m_address_profiler_ptr;
AddressProfiler* m_inst_profiler_ptr;
- std::vector<int64> m_instructions_executed_at_start;
- std::vector<int64> m_cycles_executed_at_start;
-
Cycles m_ruby_start;
time_t m_real_time_start_time;
int64_t m_busyBankCount;
- Histogram m_multicast_retry_histogram;
-
- Histogram m_filter_action_histogram;
- Histogram m_tbeProfile;
Histogram m_read_sharing_histogram;
Histogram m_write_sharing_histogram;
int64 m_cache_to_cache;
int64 m_memory_to_cache;
- Histogram m_prefetchWaitHistogram;
-
std::vector<Histogram> m_missLatencyHistograms;
std::vector<Histogram> m_machLatencyHistograms;
std::vector< std::vector<Histogram> > m_missMachLatencyHistograms;