ls004: Fixed formatting.

diff --git a/openpower/sv/rfc/ls004.mdwn b/openpower/sv/rfc/ls004.mdwn
index 60c14d47c315838b5038bfe3092ca07700a8019c..b6697e4e3f8823e5aa67e073b4545708fc8cbdaa 100644 (file)
--- a/openpower/sv/rfc/ls004.mdwn
+++ b/openpower/sv/rfc/ls004.mdwn
@@ -104,6 +104,7 @@ Operands RA and RB, and the result RT are all 64-bit, unsigned integers.
 
 **NEED EXAMPLES (not sure how to embedd sm)!!!**
 Examples:
+
 ```
 # 
 shadd r4, r1, r2
@@ -132,6 +133,7 @@ The result is shifted `n` + (RA), and is stored in register RT.
 Operands RA and RB, and the result RT are all 64-bit, unsigned integers.
 
 Examples:
+
 ```
 # 
 shadduw r4, r1, r2