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divider: Fix d_out.overflow U state issue
author
Anton Blanchard
<anton@linux.ibm.com>
Sun, 12 Jun 2022 00:34:20 +0000
(10:34 +1000)
committer
Anton Blanchard
<anton@ozlabs.org>
Sun, 12 Jun 2022 00:34:20 +0000
(10:34 +1000)
While we should only look at this when d_out.valid = 1, we may as remove
some U state across interfaces.
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
divider.vhdl
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diff --git
a/divider.vhdl
b/divider.vhdl
index a8bcdbeb5853c2fe68c80bf27158b4feb86a1050..3f9b312801d165bed69e9caa22394bcd6fba9e9e 100644
(file)
--- a/
divider.vhdl
+++ b/
divider.vhdl
@@
-42,6
+42,8
@@
begin
quot <= (others => '0');
running <= '0';
count <= "0000000";
+ is_32bit <= '0';
+ overflow <= '0';
elsif d_in.valid = '1' then
if d_in.is_extended = '1' then
dend <= '0' & d_in.dividend & x"0000000000000000";