flatten: simplify. NFC.

Remove redundant sigmaps.

diff --git a/passes/techmap/flatten.cc b/passes/techmap/flatten.cc
index 82e6974952f455b3265e7d0e636f6f9df7109c61..75345fcc1096d770c0cacbbb573ead56b4304779 100644 (file)
--- a/passes/techmap/flatten.cc
+++ b/passes/techmap/flatten.cc
@@ -52,7 +52,6 @@ void apply_prefix(IdString prefix, RTLIL::SigSpec &sig, RTLIL::Module *module)
 struct FlattenWorker
 {
        dict<std::pair<IdString, dict<IdString, RTLIL::Const>>, RTLIL::Module*> cache;
-       dict<Module*, SigMap> sigmaps;
 
        pool<IdString> flatten_do_list;
        pool<IdString> flatten_done_list;
@@ -122,6 +121,8 @@ struct FlattenWorker
                        design->select(module, w);
                }
 
+               SigMap sigmap(module);
+
                SigMap tpl_sigmap(tpl);
                pool<SigBit> tpl_written_bits;
 
@@ -185,10 +186,7 @@ struct FlattenWorker
 
                        // connect internal and external wires
 
-                       if (sigmaps.count(module) == 0)
-                               sigmaps[module].set(module);
-
-                       if (sigmaps.at(module)(c.first).has_const())
+                       if (sigmap(c.first).has_const())
                                log_error("Mismatch in directionality for cell port %s.%s.%s: %s <= %s\n",
                                        log_id(module), log_id(cell), log_id(it.first), log_signal(c.first), log_signal(c.second));
 
@@ -258,8 +256,6 @@ struct FlattenWorker
                bool did_something = false;
                LogMakeDebugHdl mkdebug;
 
-               SigMap sigmap(module);
-
                for (auto cell : module->selected_cells())
                {
                        if (!design->has(cell->type))