arch-arm: VSTTBR_EL2 doesn't contain a VMID field

Change-Id: Ia6e14b509d7016020af9c85941e7b2d89dcdd359
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32637
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 4d54b54b7eeb2b6754cfc56521dc103d05cf9093..dc4296d776ad554b81bd8cc23fdeb156bf72d596 100644 (file)
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -1422,9 +1422,7 @@ TLB::updateMiscReg(ThreadContext *tc, ArmTranslationType tranType)
         scr = tc->readMiscReg(MISCREG_SCR_EL3);
         isPriv = aarch64EL != EL0;
         if (haveVirtualization) {
-            uint64_t vttbr = isSecure? tc->readMiscReg(MISCREG_VSTTBR_EL2):
-                                       tc->readMiscReg(MISCREG_VTTBR_EL2);
-            vmid           = bits(vttbr, 55, 48);
+            vmid = bits(tc->readMiscReg(MISCREG_VTTBR_EL2), 55, 48);
             isHyp = aarch64EL == EL2;
             isHyp |= tranType & HypMode;
             isHyp &= (tranType & S1S2NsTran) == 0;