cpu-o3: Add missing vector stat initializers

All of the O3 vector stats added by 'arch: ISA parser additions of
vector registers' are currently missing their stat initializers. Add
the missing stat initialization to InstructionQueue::regStats.

Change-Id: Idc4b8e2824120a2542d8a604340a1b41bde6aa28
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/6101
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index 3da72fd863ea451c623a22c9c683e11cfaff3c0c..f70f66274f8d63bf3b6ee75afd1efcf56823f7df 100644 (file)
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -369,6 +369,21 @@ InstructionQueue<Impl>::regStats()
         .desc("Number of floating instruction queue wakeup accesses")
         .flags(total);
 
+    vecInstQueueReads
+        .name(name() + ".vec_inst_queue_reads")
+        .desc("Number of vector instruction queue reads")
+        .flags(total);
+
+    vecInstQueueWrites
+        .name(name() + ".vec_inst_queue_writes")
+        .desc("Number of vector instruction queue writes")
+        .flags(total);
+
+    vecInstQueueWakeupAccesses
+        .name(name() + ".vec_inst_queue_wakeup_accesses")
+        .desc("Number of vector instruction queue wakeup accesses")
+        .flags(total);
+
     intAluAccesses
         .name(name() + ".int_alu_accesses")
         .desc("Number of integer alu accesses")
@@ -379,6 +394,11 @@ InstructionQueue<Impl>::regStats()
         .desc("Number of floating point alu accesses")
         .flags(total);
 
+    vecAluAccesses
+        .name(name() + ".vec_alu_accesses")
+        .desc("Number of vector alu accesses")
+        .flags(total);
+
 }
 
 template <class Impl>