arch: Get rid of the (Big|Little)EndianGuest namespaces.

These namespaces were used to set up an environment/context where there
was an implicit guest namespace. This is an issue when there may be
multiple guest endiannesses which might be different. In cases where
we don't know what the guest endianness is, we can't rely on it being
an implicit part of our context since that would be ambiguous. In cases
where we do know, for instance in ISA specific code, we can just use
the endianness specific version that's appropriate for that context.

This also (somewhat) removes the assumption that there is a single
endianness that applies for a particular ISA. Practically speaking this
assumption will probably still stand though, since there would likely
be a non-trivial performance penalty to apply a configurable endianness
instead of a fixed one the compiler can optomize/remove.

Change-Id: I2dff338b58726d724f387388efe32d9233885680
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22374
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh
index 61688b5c8be155b3177db36e540c8bdfc6026850..22fc0c454e71594f6b1b779a22688f0ac4186411 100644 (file)
--- a/src/arch/alpha/isa_traits.hh
+++ b/src/arch/alpha/isa_traits.hh
@@ -32,8 +32,6 @@
 #ifndef __ARCH_ALPHA_ISA_TRAITS_HH__
 #define __ARCH_ALPHA_ISA_TRAITS_HH__
 
-namespace LittleEndianGuest {}
-
 #include "arch/alpha/ipr.hh"
 #include "arch/alpha/types.hh"
 #include "base/types.hh"
@@ -41,7 +39,7 @@ namespace LittleEndianGuest {}
 
 namespace AlphaISA {
 
-using namespace LittleEndianGuest;
+const ByteOrder GuestByteOrder = LittleEndianByteOrder;
 
 StaticInstPtr decodeInst(ExtMachInst);
 

diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index 5763e7747dfe780085f54aaf03892caec5b018c6..3427837d7c27bc0eb2f833d8d65a7f1b3d2ff5ca 100644 (file)
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -49,11 +49,9 @@
 #include "base/types.hh"
 #include "cpu/static_inst_fwd.hh"
 
-namespace LittleEndianGuest {}
-
 namespace ArmISA
 {
-    using namespace LittleEndianGuest;
+    const ByteOrder GuestByteOrder = LittleEndianByteOrder;
 
     StaticInstPtr decodeInst(ExtMachInst);
 

diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh
index 6e08c7e855b1ba8b36ee2165a466cb64d791f3b7..8dd7054ba013e5ca2a847e2199984deb1d288321 100644 (file)
--- a/src/arch/mips/isa_traits.hh
+++ b/src/arch/mips/isa_traits.hh
@@ -38,12 +38,10 @@
 #include "base/types.hh"
 #include "cpu/static_inst_fwd.hh"
 
-namespace LittleEndianGuest {}
-
 namespace MipsISA
 {
 
-using namespace LittleEndianGuest;
+const ByteOrder GuestByteOrder = LittleEndianByteOrder;
 
 StaticInstPtr decodeInst(ExtMachInst);
 

diff --git a/src/arch/mips/system.cc b/src/arch/mips/system.cc
index 9967aa82c7a5e798d4893a897fccba01214ce2bd..3d2be34c84f14cff557035e904a81efd3b980a79 100644 (file)
--- a/src/arch/mips/system.cc
+++ b/src/arch/mips/system.cc
@@ -41,8 +41,6 @@
 #include "params/MipsSystem.hh"
 #include "sim/byteswap.hh"
 
-using namespace LittleEndianGuest;
-
 MipsSystem::MipsSystem(Params *p) : System(p)
 {
 }

diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh
index 9afe6803a1f99ae4f204dce66a1057ca5e0d499f..020913397d73940891725d7b526947da2d62e4dc 100644 (file)
--- a/src/arch/power/isa_traits.hh
+++ b/src/arch/power/isa_traits.hh
@@ -39,12 +39,10 @@
 #include "base/types.hh"
 #include "cpu/static_inst_fwd.hh"
 
-namespace BigEndianGuest {}
-
 namespace PowerISA
 {
 
-using namespace BigEndianGuest;
+const ByteOrder GuestByteOrder = BigEndianByteOrder;
 
 StaticInstPtr decodeInst(ExtMachInst);
 

diff --git a/src/arch/riscv/isa_traits.hh b/src/arch/riscv/isa_traits.hh
index abafad2e22da47faa2e382fbc52315597c395276..f69e71994d6dda586643002062e823165e11de6a 100644 (file)
--- a/src/arch/riscv/isa_traits.hh
+++ b/src/arch/riscv/isa_traits.hh
@@ -50,12 +50,10 @@
 #include "base/types.hh"
 #include "cpu/static_inst_fwd.hh"
 
-namespace LittleEndianGuest {}
-
 namespace RiscvISA
 {
 
-using namespace LittleEndianGuest;
+const ByteOrder GuestByteOrder = LittleEndianByteOrder;
 
 const Addr PageShift = 12;
 const Addr PageBytes = ULL(1) << PageShift;

diff --git a/src/arch/riscv/system.cc b/src/arch/riscv/system.cc
index 88d6251cc27ad90944b904378e845d54dd24d6a1..2017eed98354b35c0b405fb1c88a091d66b77eba 100644 (file)
--- a/src/arch/riscv/system.cc
+++ b/src/arch/riscv/system.cc
@@ -42,8 +42,6 @@
 #include "params/RiscvSystem.hh"
 #include "sim/byteswap.hh"
 
-using namespace LittleEndianGuest;
-
 RiscvSystem::RiscvSystem(Params *p)
     : System(p),
       _isBareMetal(p->bare_metal),

diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index f42cdb9f55376713988bc5e22064c195cde87b6e..c942a6edca088b1c7aee9a0c4198e87ce2d36948 100644 (file)
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -37,12 +37,10 @@
 #include "base/types.hh"
 #include "cpu/static_inst_fwd.hh"
 
-namespace BigEndianGuest {}
-
 namespace SparcISA
 {
-// This makes sure the big endian versions of certain functions are used.
-using namespace BigEndianGuest;
+
+const ByteOrder GuestByteOrder = BigEndianByteOrder;
 
 const Addr PageShift = 13;
 const Addr PageBytes = ULL(1) << PageShift;

diff --git a/src/arch/sparc/system.cc b/src/arch/sparc/system.cc
index 2d79ab4c3c0e1f633127768817d52dd8f2691518..1a809beba04881d2637a05ff6954d25b0080bb0b 100644 (file)
--- a/src/arch/sparc/system.cc
+++ b/src/arch/sparc/system.cc
@@ -38,8 +38,6 @@
 #include "params/SparcSystem.hh"
 #include "sim/byteswap.hh"
 
-using namespace BigEndianGuest;
-
 namespace
 {
 

diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 158e2f9e43fb35433b540bb01751df9ab143f644..3dbacd05605d5a0a5722accb5f66448834bd5614 100644 (file)
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -45,13 +45,9 @@
 #include "base/compiler.hh"
 #include "base/types.hh"
 
-namespace LittleEndianGuest {}
-
 namespace X86ISA
 {
-    //This makes sure the little endian version of certain functions
-    //are used.
-    using namespace LittleEndianGuest;
+    const ByteOrder GuestByteOrder = LittleEndianByteOrder;
 
     const Addr PageShift = 12;
     const Addr PageBytes = ULL(1) << PageShift;

diff --git a/src/arch/x86/linux/system.cc b/src/arch/x86/linux/system.cc
index b4cd70e30fbeea0fb808bdc91d568ac43cab3ad9..0aa94a225a50062b6fb1b2d58dc9a407794b2484 100644 (file)
--- a/src/arch/x86/linux/system.cc
+++ b/src/arch/x86/linux/system.cc
@@ -48,7 +48,6 @@
 #include "params/LinuxX86System.hh"
 #include "sim/byteswap.hh"
 
-using namespace LittleEndianGuest;
 using namespace X86ISA;
 
 LinuxX86System::LinuxX86System(Params *p)

diff --git a/src/arch/x86/system.cc b/src/arch/x86/system.cc
index 704a37abad88d9dca0c4b33d9287287d79311827..096f10f5e2153273ca122aa6e679e91198f2cb5d 100644 (file)
--- a/src/arch/x86/system.cc
+++ b/src/arch/x86/system.cc
@@ -48,7 +48,6 @@
 #include "cpu/thread_context.hh"
 #include "params/X86System.hh"
 
-using namespace LittleEndianGuest;
 using namespace X86ISA;
 
 X86System::X86System(Params *p) :

diff --git a/src/sim/byteswap.hh b/src/sim/byteswap.hh
index 0b41c6779af2bd0e135fff819fb6480a4db2673a..6745e0060bb9e39970f5c2019b1dc45e3c45bc31 100644 (file)
--- a/src/sim/byteswap.hh
+++ b/src/sim/byteswap.hh
@@ -169,37 +169,4 @@ inline T gtoh(T value, ByteOrder guest_byte_order)
         betoh(value) : letoh(value);
 }
 
-namespace BigEndianGuest
-{
-    const ByteOrder GuestByteOrder = BigEndianByteOrder;
-    template <typename T>
-    inline T gtole(T value) {return betole(value);}
-    template <typename T>
-    inline T letog(T value) {return letobe(value);}
-    template <typename T>
-    inline T gtobe(T value) {return value;}
-    template <typename T>
-    inline T betog(T value) {return value;}
-    template <typename T>
-    inline T htog(T value) {return htobe(value);}
-    template <typename T>
-    inline T gtoh(T value) {return betoh(value);}
-}
-
-namespace LittleEndianGuest
-{
-    const ByteOrder GuestByteOrder = LittleEndianByteOrder;
-    template <typename T>
-    inline T gtole(T value) {return value;}
-    template <typename T>
-    inline T letog(T value) {return value;}
-    template <typename T>
-    inline T gtobe(T value) {return letobe(value);}
-    template <typename T>
-    inline T betog(T value) {return betole(value);}
-    template <typename T>
-    inline T htog(T value) {return htole(value);}
-    template <typename T>
-    inline T gtoh(T value) {return letoh(value);}
-}
 #endif // __SIM_BYTE_SWAP_HH__