radeonsi: replace AMDGPU.bfe.* with amdgcn.*bfe

Reviewed-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index a569a7c30f1a482f8948a819907f51e12200d950..34085bb7e5331aed4ac91bd1e5a10b61441dcc23 100644 (file)
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1121,3 +1121,29 @@ void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
                                       NULL, 0, AC_FUNC_ATTR_LEGACY);
        }
 }
+
+LLVMValueRef ac_emit_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
+                        LLVMValueRef offset, LLVMValueRef width,
+                        bool is_signed)
+{
+       LLVMValueRef args[] = {
+               input,
+               offset,
+               width,
+       };
+
+       if (HAVE_LLVM >= 0x0500) {
+               return ac_emit_llvm_intrinsic(ctx,
+                                             is_signed ? "llvm.amdgcn.sbfe.i32" :
+                                                         "llvm.amdgcn.ubfe.i32",
+                                             ctx->i32, args, 3,
+                                             AC_FUNC_ATTR_READNONE);
+       }
+
+       return ac_emit_llvm_intrinsic(ctx,
+                                     is_signed ? "llvm.AMDGPU.bfe.i32" :
+                                                 "llvm.AMDGPU.bfe.u32",
+                                     ctx->i32, args, 3,
+                                     AC_FUNC_ATTR_READNONE |
+                                     AC_FUNC_ATTR_LEGACY);
+}

diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index af16a2bca73fa510ca002ea6c4f487356dd41931..e7773d734817904aed89728547b144a0d9c7af58 100644 (file)
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -237,6 +237,9 @@ LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
 LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
                                   LLVMValueRef args[2]);
 void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value);
+LLVMValueRef ac_emit_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
+                        LLVMValueRef offset, LLVMValueRef width,
+                        bool is_signed);
 
 #ifdef __cplusplus
 }

diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index d80848ef84324c006fd8748411632fe679833503..91fd7e40c2f487f283ce8d692db36613411e921c 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -500,16 +500,15 @@ static void emit_bfe(const struct lp_build_tgsi_action *action,
                     struct lp_build_tgsi_context *bld_base,
                     struct lp_build_emit_data *emit_data)
 {
+       struct si_shader_context *ctx = si_shader_context(bld_base);
        struct gallivm_state *gallivm = bld_base->base.gallivm;
        LLVMBuilderRef builder = gallivm->builder;
        LLVMValueRef bfe_sm5;
        LLVMValueRef cond;
 
-       bfe_sm5 = lp_build_intrinsic(builder, action->intr_name,
-                                    emit_data->dst_type, emit_data->args,
-                                    emit_data->arg_count,
-                                    LP_FUNC_ATTR_READNONE |
-                                    LP_FUNC_ATTR_LEGACY);
+       bfe_sm5 = ac_emit_bfe(&ctx->ac, emit_data->args[0],
+                             emit_data->args[1], emit_data->args[2],
+                             emit_data->info->opcode == TGSI_OPCODE_IBFE);
 
        /* Correct for GLSL semantics. */
        cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[2],
@@ -770,7 +769,6 @@ void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
        bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp;
        bld_base->op_actions[TGSI_OPCODE_IABS].emit = emit_iabs;
        bld_base->op_actions[TGSI_OPCODE_IBFE].emit = emit_bfe;
-       bld_base->op_actions[TGSI_OPCODE_IBFE].intr_name = "llvm.AMDGPU.bfe.i32";
        bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv;
        bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int;
        bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int;
@@ -820,7 +818,6 @@ void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
        bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.trunc.f32";
        bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd;
        bld_base->op_actions[TGSI_OPCODE_UBFE].emit = emit_bfe;
-       bld_base->op_actions[TGSI_OPCODE_UBFE].intr_name = "llvm.AMDGPU.bfe.u32";
        bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv;
        bld_base->op_actions[TGSI_OPCODE_UMAX].emit = emit_minmax_int;
        bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int;