Alpha: Fix Alpha NumMiscArchRegs constant.

Also add asserts in O3's Scoreboard class to catch bad indexes.

diff --git a/src/arch/alpha/registers.hh b/src/arch/alpha/registers.hh
index d8752d520724913810ba1df17ae88677f5cf173a..1c4bbdca3cc6391d59afdb529bd4c02e2b1537c2 100644 (file)
--- a/src/arch/alpha/registers.hh
+++ b/src/arch/alpha/registers.hh
@@ -63,7 +63,8 @@ enum MiscRegIndex
     MISCREG_UNIQ,
     MISCREG_LOCKFLAG,
     MISCREG_LOCKADDR,
-    MISCREG_INTR
+    MISCREG_INTR,
+    NUM_MISCREGS
 };
 
 // semantically meaningful register indices
@@ -84,15 +85,14 @@ const RegIndex SyscallSuccessReg = 19;
 const int NumIntArchRegs = 32;
 const int NumPALShadowRegs = 8;
 const int NumFloatArchRegs = 32;
-// @todo: Figure out what this number really should be.
-const int NumMiscArchRegs = 77;
+const int NumMiscArchRegs = NUM_MISCREGS;
 
 const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs;
 const int NumFloatRegs = NumFloatArchRegs;
 const int NumMiscRegs = NumMiscArchRegs;
 
 const int TotalNumRegs =
-    NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs;
+    NumIntRegs + NumFloatRegs + NumMiscRegs;
 
 const int TotalDataRegs = NumIntRegs + NumFloatRegs;
 

diff --git a/src/cpu/o3/scoreboard.cc b/src/cpu/o3/scoreboard.cc
index ae1e13717c1536ffcbdc464a5d2b2668ea31091f..7fb47f3c72abb58127274863cc70fcb9a0c1dbe4 100644 (file)
--- a/src/cpu/o3/scoreboard.cc
+++ b/src/cpu/o3/scoreboard.cc
@@ -51,22 +51,25 @@ Scoreboard::Scoreboard(unsigned activeThreads,
     numPhysicalRegs = numPhysicalIntRegs  + numPhysicalFloatRegs;
 
     //Resize scoreboard appropriately
-    regScoreBoard.resize(numPhysicalRegs + (numMiscRegs * activeThreads));
+    resize(numPhysicalRegs + (numMiscRegs * activeThreads));
 
     //Initialize values
     for (int i=0; i < numLogicalIntRegs * activeThreads; i++) {
+        assert(indexInBounds(i));
         regScoreBoard[i] = 1;
     }
 
     for (int i= numPhysicalIntRegs;
          i < numPhysicalIntRegs + (numLogicalFloatRegs * activeThreads);
          i++) {
+        assert(indexInBounds(i));
         regScoreBoard[i] = 1;
     }
 
     for (int i = numPhysicalRegs;
          i < numPhysicalRegs + (numMiscRegs * activeThreads);
          i++) {
+        assert(indexInBounds(i));
         regScoreBoard[i] = 1;
     }
 }
@@ -93,6 +96,7 @@ Scoreboard::getReg(PhysRegIndex phys_reg)
     }
 #endif
 
+    assert(indexInBounds(phys_reg));
     return regScoreBoard[phys_reg];
 }
 
@@ -101,6 +105,7 @@ Scoreboard::setReg(PhysRegIndex phys_reg)
 {
     DPRINTF(Scoreboard, "Setting reg %i as ready\n", phys_reg);
 
+    assert(indexInBounds(phys_reg));
     regScoreBoard[phys_reg] = 1;
 }
 
@@ -120,5 +125,6 @@ Scoreboard::unsetReg(PhysRegIndex ready_reg)
     }
 #endif
 
+    assert(indexInBounds(ready_reg));
     regScoreBoard[ready_reg] = 0;
 }

diff --git a/src/cpu/o3/scoreboard.hh b/src/cpu/o3/scoreboard.hh
index eefff1d8b4e35583f22297fd82c699836175f51d..b1c2bd0269e2cb197727dba2f6205b9cc37648da 100644 (file)
--- a/src/cpu/o3/scoreboard.hh
+++ b/src/cpu/o3/scoreboard.hh
@@ -111,6 +111,21 @@ class Scoreboard
 
     /** The logical index of the zero register. */
     int zeroRegIdx;
+
+    int currentSize;
+
+    void
+    resize(int newSize)
+    {
+        currentSize = newSize;
+        regScoreBoard.resize(newSize);
+    }
+
+    bool
+    indexInBounds(int idx)
+    {
+        return idx < currentSize;
+    }
 };
 
 #endif