projects / openpower-isa.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: e88b945)
power_insn: stricter reg type check
authorDmitry Selyutin <ghostmansd@gmail.com>
Tue, 6 Sep 2022 11:51:18 +0000 (14:51 +0300)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 6 Sep 2022 19:13:33 +0000 (20:13 +0100)
src/openpower/decoder/power_insn.py patch | blob | history

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index 4e05468188a4d162751467fa8d3ab0a43081a0da..50889fe553a3a548ab8fcdd3b98aed9c84642a73 100644 (file)
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -532,7 +532,7 @@ class DynamicOperandReg(DynamicOperand):
                     "in1", "in2", "in3", "cr_in",
                     "out", "out2", "cr_out",
                 }):
-            if self.extra_reg == record.svp64.extra_reg(key):
+            if self.extra_reg is record.svp64.extra_reg(key):
                 return record.extra_idx(key)
 
         return _SVExtra.NONE