* doc/sourcebuild.texi (arm_tune_string_ops_prefer_neon): New.
gcc/testsuite/ChangeLog
* lib/target-supports.exp (arm_tune_string_ops_prefer_neon): New.
* gcc.target/arm/memset-inline-4.c: Skip for
arm_tune_string_ops_prefer_neon.
* gcc.target/arm/memset-inline-5.c: Ditto.
* gcc.target/arm/memset-inline-6.c: Ditto.
* gcc.target/arm/memset-inline-8.c: Ditto.
* gcc.target/arm/memset-inline-9.c: Ditto.
From-SVN: r221651
+2015-03-25 Bin Cheng <bin.cheng@arm.com>
+
+ * doc/sourcebuild.texi (arm_tune_string_ops_prefer_neon): New.
+
2015-03-25 Bin Cheng <bin.cheng@arm.com>
* config/arm/arm.opt (print_tune_info): New option.
@item arm_neon
ARM target supports generating NEON instructions.
+@item arm_tune_string_ops_prefer_neon
+Test CPU tune supports inlining string operations with NEON instructions.
+
@item arm_neon_hw
Test system supports executing NEON instructions.
+2015-03-25 Bin Cheng <bin.cheng@arm.com>
+
+ * lib/target-supports.exp (arm_tune_string_ops_prefer_neon): New.
+ * gcc.target/arm/memset-inline-4.c: Skip for
+ arm_tune_string_ops_prefer_neon.
+ * gcc.target/arm/memset-inline-5.c: Ditto.
+ * gcc.target/arm/memset-inline-6.c: Ditto.
+ * gcc.target/arm/memset-inline-8.c: Ditto.
+ * gcc.target/arm/memset-inline-9.c: Ditto.
+
2015-03-24 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58923
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" { *-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { ! arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -Os -fno-inline" } */
/* { dg-add-options "arm_neon" } */
} "-mthumb"]
}
+# Return 1 if this compilation turns on string_ops_prefer_neon on.
+
+proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
+ return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
+ int foo (void) { return 0; }
+ } "-O2 -mprint-tune-info" ]
+}
+
# Return 1 if the target supports executing NEON instructions, 0
# otherwise. Cache the result.