i965: Use UW-typed immediate in multiply inst.
authorMatt Turner <mattst88@gmail.com>
Wed, 3 Jun 2015 00:46:38 +0000 (17:46 -0700)
committerMatt Turner <mattst88@gmail.com>
Wed, 3 Jun 2015 17:47:41 +0000 (10:47 -0700)
Some hardware reads only the low 16-bits even if the type is UD, but
other hardware like Cherryview can't handle this.

Fixes spec@arb_gpu_shader5@execution@sampler_array_indexing@fs-simple on
Cherryview.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90830
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp

index 40a3db3040e54cb8071ceae66eb0084fd5893100..ff05b2a35abd0441062f9c4e6c41373a6dbf90a8 100644 (file)
@@ -788,7 +788,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
       brw_set_default_access_mode(p, BRW_ALIGN_1);
 
       /* addr = ((sampler * 0x101) + base_binding_table_index) & 0xfff */
-      brw_MUL(p, addr, sampler_reg, brw_imm_ud(0x101));
+      brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
       if (base_binding_table_index)
          brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index));
       brw_AND(p, addr, addr, brw_imm_ud(0xfff));
index ead620b3c00bd277b2b2123bf72670840d6d7d2a..67495d2d76e3ad89989f515cf6eec2ee8b27de5c 100644 (file)
@@ -407,7 +407,7 @@ vec4_generator::generate_tex(vec4_instruction *inst,
       brw_set_default_access_mode(p, BRW_ALIGN_1);
 
       /* addr = ((sampler * 0x101) + base_binding_table_index) & 0xfff */
-      brw_MUL(p, addr, sampler_reg, brw_imm_ud(0x101));
+      brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
       if (base_binding_table_index)
          brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index));
       brw_AND(p, addr, addr, brw_imm_ud(0xfff));