pique your interest.
3. After that, go ahead and take a look at the [git repositories](https://git.libre-riscv.org).
-<div class="jumbotron">
-<p>pip3 install virtualenv requests
-</p>
-<p>mkdir ~/.virtualenvs && cd ~/.virtualenvs
-</p>
-<p>python3 -m venv libresoc
-</p>
-<p>source ~/.virtualenvs/bin/activate
-</p>
-<p>
-</p>
-<p>cd ~; mkdir libresoc; cd libresoc
-</p>
-<p>git clone https://git.libre-riscv.org/git/nmutil.git
-</p>
-<p>git clone https://git.libre-riscv.org/git/ieee754fpu.git
-</p>
-<p>git clone --recursive https://git.libre-riscv.org/git/soc.git
-</p>
-<p>
-</p>
-<p>cd nmutil; pip3 install -e .; cd ..
-</p>
-<p>cd ieee754fpu; pip3 install -e .; cd ..
-</p>
-<p>cd soc; pip3 install -e .; cd ..
-</p>
-<p>
-</p>
-<p>#play with the decoder
-</p>
-<p>python3 soc/src/soc/decoder/power_decoder.py
-</div>
-
-
4. If you plan to do HDL work, you should familiarize yourself with our
[[HDL_workflow]].
5. We do have funding available (see [[nlnet]]) upon completion of issues -
Also note that you can edit this wiki. You can experiment in the [[Sandbox]].
+## Quick peek at the code
+
+Here is an example process of how to play with the soc code:
+
+<div class="jumbotron">
+pip3 install virtualenv requests <br />
+mkdir ~/.virtualenvs && cd ~/.virtualenvs <br />
+python3 -m venv libresoc <br />
+source ~/.virtualenvs/bin/activate <br />
+<br />
+cd ~; mkdir libresoc; cd libresoc <br />
+git clone https://git.libre-riscv.org/git/nmutil.git <br />
+git clone https://git.libre-riscv.org/git/ieee754fpu.git <br />
+git clone --recursive https://git.libre-riscv.org/git/soc.git <br />
+<br />
+cd nmutil; pip3 install -e .; cd .. <br />
+cd ieee754fpu; pip3 install -e .; cd .. <br />
+cd soc; pip3 install -e .; cd .. <br />
+<br />
+# play with the decoder <br />
+python3 soc/src/soc/decoder/power_decoder.py <br />
+# after installing yosys
+yosys -p "read_ilang decoder.il; show dec31"
+</div>
+
## How can I learn?
The whole purpose of this project is to be a learning environment as well