radeonsi/gfx9: fix and enable MSAA compression

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 874535a6b773c28d6f984a80065e721150b226e4..2e34b76929ee822445a502297e42e1462e2873f4 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4609,9 +4609,8 @@ static void tex_fetch_args(
         * The sample index should be adjusted as follows:
         *   sample_index = (fmask >> (sample_index * 4)) & 0xF;
         */
-       if (ctx->screen->b.chip_class <= VI && /* TODO: fix FMASK on GFX9 */
-           (target == TGSI_TEXTURE_2D_MSAA ||
-            target == TGSI_TEXTURE_2D_ARRAY_MSAA)) {
+       if (target == TGSI_TEXTURE_2D_MSAA ||
+           target == TGSI_TEXTURE_2D_ARRAY_MSAA) {
                struct lp_build_context *uint_bld = &bld_base->uint_bld;
                struct lp_build_emit_data txf_emit_data = *emit_data;
                LLVMValueRef txf_address[4];

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 78d699632a8d0e1a04d1452671bae4c2f9832fd2..35fadec2a1e8f3cba7433b1cb8429e32add6675b 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2198,8 +2198,7 @@ static void si_initialize_color_surface(struct si_context *sctx,
                                S_028C74_NUM_FRAGMENTS(log_samples);
 
                if (rtex->fmask.size) {
-                        /* TODO: fix FMASK on GFX9: */
-                       color_info |= S_028C70_COMPRESSION(sctx->b.chip_class <= VI);
+                       color_info |= S_028C70_COMPRESSION(1);
                        unsigned fmask_bankh = util_logbase2(rtex->fmask.bank_height);
 
                        if (sctx->b.chip_class == SI) {

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 756608793b5c47f1b8381a891830b1221e70eac7..1e63d6467104e45148776d9a971b690b02f210ea 100644 (file)
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -753,7 +753,7 @@ static int gfx9_compute_miptree(struct amdgpu_winsys *ws,
          if (ret != ADDR_OK)
             return ret;
 
-         surf->u.gfx9.fmask.swizzle_mode = in->swizzleMode;
+         surf->u.gfx9.fmask.swizzle_mode = fin.swizzleMode;
          surf->u.gfx9.fmask.epitch = fout.pitch - 1;
          surf->u.gfx9.fmask_size = fout.fmaskBytes;
          surf->u.gfx9.fmask_alignment = fout.baseAlign;