added english language description for lhzsx instruction
authorShriya Sharma <shriya@redsemiconductor.com>
Fri, 27 Oct 2023 10:24:39 +0000 (11:24 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 29 Oct 2023 08:54:37 +0000 (08:54 +0000)
openpower/isa/fixedloadshift.mdwn

index 7a4fe66082c712afaf9e1a29a8384e278fd1422b..dfef1d51d743c66052ef72989f5e863a89c429b0 100644 (file)
@@ -91,6 +91,16 @@ Pseudo-code:
     EA <- b + (RB) << (SH+1)
     RT <- ([0] * (XLEN-16)) || MEM(EA, 2)
 
+Description:
+
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and (RA|0).
+
+    The halfword in storage addressed by EA is loaded into
+    RT[48:63]. RT[0:47] are set to 0.
+
+
+
 Special Registers Altered:
 
     None