reword fmv[f/t]gs as requested by feedback

diff --git a/openpower/sv/int_fp_mv/moves_and_conversions.mdwn b/openpower/sv/int_fp_mv/moves_and_conversions.mdwn
index 11468dc4accf34fd60aa419e729cb87e3f61eb0d..d51f68b23bd5b9f6754fab2ef100d0b541aef7a5 100644 (file)
--- a/openpower/sv/int_fp_mv/moves_and_conversions.mdwn
+++ b/openpower/sv/int_fp_mv/moves_and_conversions.mdwn
@@ -81,9 +81,10 @@ Special Registers altered:
     RT <- [0] * 32 || SINGLE((FRB))  # SINGLE since that's what stfs uses
 ```
 
-Move a 32-bit float from a FPR to a GPR, just copying bits of the IEEE 754
-representation directly. This is equivalent to `stfs` followed by `lwz`.
-As `fmvtgs` is just copying bits, `FPSCR` is not affected in any way.
+Move a BFP32 from a FPR to a GPR, by using `SINGLE` to extract the standard
+`BFP32` form from FRB and zero-extending the result to 64-bits and storing to
+RT. This is equivalent to `stfs` followed by `lwz`.
+As `fmvtgs` is just copying the BFP32 form, `FPSCR` is not affected in any way.
 
 Rc=1 tests RT and sets CR0, exactly like all other Scalar Fixed-Point
 operations.
@@ -143,9 +144,10 @@ Special Registers altered:
     FRT <- DOUBLE((RB)[32:63])  # DOUBLE since that's what lfs uses
 ```
 
-move a 32-bit float from a GPR to a FPR, just copying bits of the IEEE 754
-representation directly. This is equivalent to `stw` followed by `lfs`.
-As `fmvfgs` is just copying bits, `FPSCR` is not affected in any way.
+Move a BFP32 from a GPR to a FPR, by using `DOUBLE` on the least significant
+32-bits of RB to do the standard BFP32 in BFP64 trick and store the result in
+FRT. This is equivalent to `stw` followed by `lfs`.
+As `fmvfgs` is just copying the BFP32 form, `FPSCR` is not affected in any way.
 
 Rc=1 tests FRT and sets CR1, exactly like all other Scalar Floating-Point
 operations.