(no commit message)
authorcolepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 <colepoirier@web>
Tue, 23 Jun 2020 21:44:09 +0000 (22:44 +0100)
committerIkiWiki <ikiwiki.info>
Tue, 23 Jun 2020 21:44:09 +0000 (22:44 +0100)
cole.mdwn

index 9addee630884605eea8685ff13e982f11e10e87f..6bd1088b8a0e9ffb3ae15e4bf85e0b6c24764805 100644 (file)
--- a/cole.mdwn
+++ b/cole.mdwn
@@ -8,10 +8,15 @@ List of things that need more fleshed out bug reports:
 
 * Convert hand-drawn 180nm Test ASIC's Memory Layout diagram into editable SVG
 * Memory bus/L1/L2 Cache documentation  (bug #397)
+
 * Bperm tutorial
+
 * Bugseverywhere (or also https://github.com/MichaelMure/git-bug/blob/master/bug/bug.go)
+
 * Competition to LS: Skywater 130nm production-ready PDK gets opensourced (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008254.html)
 
 * Scoreboard documentation (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html)
+
 * LDST documentation (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html)
+
 * Follow up with graphics engineers, esp ones Yehowshua has already reached out to (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008283.html)