Add a default value for RESET_ADDRESS

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>

diff --git a/fetch1.vhdl b/fetch1.vhdl
index 14ef8e8d1fa28dc91a09b64acd7013f9c81e2d80..ff7d64adca7c309554ee9aa0e08fee5f98423632 100644 (file)
--- a/fetch1.vhdl
+++ b/fetch1.vhdl
@@ -7,7 +7,7 @@ use work.common.all;
 
 entity fetch1 is
        generic(
-               RESET_ADDRESS : std_logic_vector(63 downto 0)
+               RESET_ADDRESS : std_logic_vector(63 downto 0) := (others => '0')
        );
        port(
                clk           : in std_ulogic;