i386.md (addsi3_cc): Add "binary_operator_ok" to the condition.

	* i386.md (addsi3_cc): Add "binary_operator_ok" to the condition.
	(addsi3_carry): Likewise.
	(sbbsi3_cc): Add "binary_operator_ok" to the condition.
	(sbbsi3_carry): Likewise.
	(mulsi3): Rewrite to expander, ensure that only one operand is memory.
	(mulhi3): Likewise.
	(test?i_1): Ensure that only one operand is memory.
	(conditional move patterns): likewise.
	(shift and rotate patterns): Rewrite to expander, add
	"binary_operator_ok" to the condition.

From-SVN: r30747

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 34b75e25b3d0c99ff80e54ab0dfd0600e1c0b7a6..5e8f864c8e404c1a712a434bb1708422e99e30b3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,16 @@
 Fri Nov 26 10:59:12 CET 1999  Jan Hubicka  <hubicka@freesoft.cz>
 
+       * i386.md (addsi3_cc): Add "binary_operator_ok" to the condition.
+       (addsi3_carry): Likewise.
+       (sbbsi3_cc): Add "binary_operator_ok" to the condition.
+       (sbbsi3_carry): Likewise.
+       (mulsi3): Rewrite to expander, ensure that only one operand is memory.
+       (mulhi3): Likewise.
+       (test?i_1): Ensure that only one operand is memory.
+       (conditional move patterns): likewise.
+       (shift and rotate patterns): Rewrite to expander, add
+       "binary_operator_ok" to the condition.
+
        * i386.md (QImode patterns): Remove '*' before the 'r' constraints.
        * i386.h (procesor_costs): Add movzbl_load field.
        (HARD_REGNO_MODE_OK): Accept QImode on non PARTIAL_REGISTER_STALL in

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index dc23e1d8abe6bbbd0462f2ce3fc7102e59e49510..e1b0a16680f7fbc1ab6793de70fd5c3da3ce7c60 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3012,7 +3012,7 @@
                    (match_operand:SI 2 "general_operand" "ri,rm")))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
        (plus:SI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (PLUS, SImode, operands)"
   "add{l}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")])
 
@@ -3022,7 +3022,7 @@
            (plus:SI (match_operand:SI 2 "general_operand" "ri,rm")
              (ltu:SI (reg:CC 17) (const_int 0)))))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (PLUS, SImode, operands)"
   "adc{l}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "pent_pair" "pu")
@@ -3526,7 +3526,7 @@
                              (match_operand:SI 2 "general_operand" "ri,rm")))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
        (minus:SI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (MINUS, SImode, operands)"
   "sub{l}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")])
 
@@ -3536,7 +3536,7 @@
            (plus:SI (match_operand:SI 2 "general_operand" "ri,rm")
              (ltu:SI (reg:CC 17) (const_int 0)))))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (MINUS, SImode, operands)"
   "sbb{l}\\t{%2, %0|%0, %2}"
   [(set_attr "type" "alu")
    (set_attr "pent_pair" "pu")
@@ -3690,12 +3690,20 @@
 \f
 ;; Multiply instructions
 
-(define_insn "mulsi3"
+(define_expand "mulsi3"
+  [(parallel [(set (match_operand:SI 0 "register_operand" "")
+                  (mult:SI (match_operand:SI 1 "register_operand" "")
+                           (match_operand:SI 2 "general_operand" "")))
+             (clobber (reg:CC 17))])]
+  ""
+  "")
+
+(define_insn "*mulsi3_1"
   [(set (match_operand:SI 0 "register_operand" "=r,r,r")
        (mult:SI (match_operand:SI 1 "nonimmediate_operand" "%rm,0,0")
                 (match_operand:SI 2 "general_operand" "K,i,mr")))
    (clobber (reg:CC 17))]
-  ""
+  "GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM"
   ; For the {r,0,i} alternative (i.e., register <- register * immediate),
   ; there are two ways of writing the exact same machine instruction
   ; in assembly language.  One, for example, is:
@@ -3715,12 +3723,20 @@
   [(set_attr "type" "imul")
    (set_attr "length" "2,3,2")])
 
-(define_insn "mulhi3"
+(define_expand "mulhi3"
+  [(parallel [(set (match_operand:HI 0 "register_operand" "")
+                  (mult:HI (match_operand:HI 1 "register_operand" "")
+                           (match_operand:HI 2 "general_operand" "")))
+             (clobber (reg:CC 17))])]
+  ""
+  "")
+
+(define_insn "*mulhi3_1"
   [(set (match_operand:HI 0 "register_operand" "=r,r")
        (mult:HI (match_operand:HI 1 "nonimmediate_operand" "%rm,0")
                 (match_operand:HI 2 "general_operand" "K,g")))
    (clobber (reg:CC 17))]
-  ""
+  "GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM"
   ; %%% There was a note about "Assembler has weird restrictions",
   ; concerning alternative 1 when op1 == op0.  True?
   "@
@@ -4057,7 +4073,7 @@
        (compare:CCNO (and:SI (match_operand:SI 0 "nonimmediate_operand" "%*a,r,rm")
                              (match_operand:SI 1 "general_operand" "in,in,rin"))
                      (const_int 0)))]
-  ""
+  "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
   "test{l}\\t{%1, %0|%0, %1}"
   [(set_attr "type" "icmp")
    (set_attr "pent_pair" "uv,np,uv")])
@@ -4067,7 +4083,7 @@
         (compare:CCNO (and:HI (match_operand:HI 0 "nonimmediate_operand" "%*a,r,rm")
                              (match_operand:HI 1 "general_operand" "n,n,rn"))
                      (const_int 0)))]
-  ""
+  "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
   "test{w}\\t{%1, %0|%0, %1}"
   [(set_attr "type" "icmp")
    (set_attr "pent_pair" "uv,np,uv")])
@@ -4077,7 +4093,7 @@
         (compare:CCNO (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm")
                              (match_operand:QI 1 "general_operand" "n,n,qn"))
                      (const_int 0)))]
-  ""
+  "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM"
   "test{b}\\t{%1, %0|%0, %1}"
   [(set_attr "type" "icmp")
    (set_attr "pent_pair" "uv,np,uv")])
@@ -5471,12 +5487,20 @@
   DONE;
 }")
 
-(define_insn "ashlsi3"
+(define_expand "ashlsi3"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "")
+       (ashift:SI (match_operand:SI 1 "nonimmediate_operand" "")
+                  (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ASHIFT, SImode, operands); DONE;")
+
+(define_insn "*ashlsi3_1"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
        (ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0,r")
                   (match_operand:QI 2 "nonmemory_operand" "cI,M")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ASHIFT, SImode, operands)"
   "*
 {
   switch (get_attr_type (insn))
@@ -5535,7 +5559,7 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (ashift:SI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ASHIFT, SImode, operands)"
   "*
 {
   switch (get_attr_type (insn))
@@ -5561,12 +5585,20 @@
           ]
           (const_string "ishift")))])
 
-(define_insn "ashlhi3"
+(define_expand "ashlhi3"
+  [(set (match_operand:HI 0 "nonimmediate_operand" "")
+       (ashift:HI (match_operand:HI 1 "nonimmediate_operand" "")
+                  (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ASHIFT, HImode, operands); DONE;")
+
+(define_insn "*ashlhi3_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashift:HI (match_operand:HI 1 "nonimmediate_operand" "0")
                   (match_operand:QI 2 "nonmemory_operand" "cI")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ASHIFT, HImode, operands)"
   "*
 {
   switch (get_attr_type (insn))
@@ -5611,7 +5643,7 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashift:HI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ASHIFT, HImode, operands)"
   "*
 {
   switch (get_attr_type (insn))
@@ -5637,13 +5669,21 @@
           ]
           (const_string "ishift")))])
 
+(define_expand "ashlqi3"
+  [(set (match_operand:QI 0 "nonimmediate_operand" "")
+       (ashift:QI (match_operand:QI 1 "nonimmediate_operand" "")
+                  (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ASHIFT, QImode, operands); DONE;")
+
 ;; %%% Potential partial reg stall on alternative 2.  What to do?
-(define_insn "ashlqi3"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,*r")
+(define_insn "*ashlqi3_1"
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,r")
        (ashift:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
                   (match_operand:QI 2 "nonmemory_operand" "cI,cI")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ASHIFT, QImode, operands)"
   "*
 {
   switch (get_attr_type (insn))
@@ -5690,7 +5730,7 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (ashift:QI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ASHIFT, QImode, operands)"
   "*
 {
   switch (get_attr_type (insn))
@@ -5821,19 +5861,28 @@
        (ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "*a,0")
                     (match_operand:SI 2 "const_int_operand" "i,i")))
    (clobber (reg:CC 17))]
-  "INTVAL (operands[2]) == 31 && (TARGET_USE_CLTD || optimize_size)"
+  "INTVAL (operands[2]) == 31 && (TARGET_USE_CLTD || optimize_size)
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "@
    {cltd|cdq}
    sar{l}\\t{%2, %0|%0, %2}"
    [(set_attr "type" "imovx,ishift")
     (set_attr "length" "1,*")])
 
-(define_insn "ashrsi3"
+(define_expand "ashrsi3"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "")
+       (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ASHIFTRT, SImode, operands); DONE;")
+
+(define_insn "*ashrsi3_1"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
        (ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "@
    sar{l}\\t{%2, %0|%0, %2}
    sar{l}\\t{%b2, %0|%0, %b2}"
@@ -5847,18 +5896,26 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
        (ashiftrt:SI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "@
    sar{l}\\t{%2, %0|%0, %2}
    sar{l}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "ashrhi3"
+(define_expand "ashrhi3"
+  [(set (match_operand:HI 0 "nonimmediate_operand" "")
+       (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ASHIFTRT, HImode, operands); DONE;")
+
+(define_insn "*ashrhi3_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
        (ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "@
    sar{w}\\t{%2, %0|%0, %2}
    sar{w}\\t{%b2, %0|%0, %b2}"
@@ -5872,18 +5929,26 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
        (ashiftrt:HI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "@
    sar{w}\\t{%2, %0|%0, %2}
    sar{w}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "ashrqi3"
+(define_expand "ashrqi3"
+  [(set (match_operand:QI 0 "nonimmediate_operand" "")
+       (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ASHIFTRT, QImode, operands); DONE;")
+
+(define_insn "*ashrqi3_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,qm")
        (ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "@
    sar{b}\\t{%2, %0|%0, %2}
    sar{b}\\t{%b2, %0|%0, %b2}"
@@ -5897,7 +5962,7 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
        (ashiftrt:QI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "@
    sar{b}\\t{%2, %0|%0, %2}
    sar{b}\\t{%b2, %0|%0, %b2}"
@@ -5960,12 +6025,20 @@
   [(const_int 0)]
   "ix86_split_lshrdi (operands, NULL_RTX); DONE;")
 
-(define_insn "lshrsi3"
+(define_expand "lshrsi3"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "")
+       (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (LSHIFTRT, SImode, operands); DONE;")
+
+(define_insn "*lshrsi3_1"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
        (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "@
    shr{l}\\t{%2, %0|%0, %2}
    shr{l}\\t{%b2, %0|%0, %b2}"
@@ -5979,18 +6052,26 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
        (lshiftrt:SI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "@
    shr{l}\\t{%2, %0|%0, %2}
    shr{l}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "lshrhi3"
+(define_expand "lshrhi3"
+  [(set (match_operand:HI 0 "nonimmediate_operand" "")
+       (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (LSHIFTRT, HImode, operands); DONE;")
+
+(define_insn "*lshrhi3_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
        (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "@
    shr{w}\\t{%2, %0|%0, %2}
    shr{w}\\t{%b2, %0|%0, %b2}"
@@ -6004,18 +6085,26 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
        (lshiftrt:HI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "@
    shr{w}\\t{%2, %0|%0, %2}
    shr{w}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "lshrqi3"
+(define_expand "lshrqi3"
+  [(set (match_operand:QI 0 "nonimmediate_operand" "")
+       (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (LSHIFTRT, QImode, operands); DONE;")
+
+(define_insn "*lshrqi3_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,qm")
        (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "@
    shr{b}\\t{%2, %0|%0, %2}
    shr{b}\\t{%b2, %0|%0, %b2}"
@@ -6029,7 +6118,7 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
        (lshiftrt:QI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "@
    shr{b}\\t{%2, %0|%0, %2}
    shr{b}\\t{%b2, %0|%0, %b2}"
@@ -6037,12 +6126,20 @@
 \f
 ;; Rotate instructions
 
-(define_insn "rotlsi3"
+(define_expand "rotlsi3"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "")
+       (rotate:SI (match_operand:SI 1 "nonimmediate_operand" "")
+                  (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ROTATE, SImode, operands); DONE;")
+
+(define_insn "*rotlsi3_1"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
        (rotate:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
                   (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ROTATE, SImode, operands)"
   "@
    rol{l}\\t{%2, %0|%0, %2}
    rol{l}\\t{%b2, %0|%0, %b2}"
@@ -6056,18 +6153,26 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
        (rotate:SI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ROTATE, SImode, operands)"
   "@
    rol{l}\\t{%2, %0|%0, %2}
    rol{l}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "rotlhi3"
+(define_expand "rotlhi3"
+  [(set (match_operand:HI 0 "nonimmediate_operand" "")
+       (rotate:HI (match_operand:HI 1 "nonimmediate_operand" "")
+                  (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ROTATE, HImode, operands); DONE;")
+
+(define_insn "*rotlhi3_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
        (rotate:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
                   (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ROTATE, HImode, operands)"
   "@
    rol{w}\\t{%2, %0|%0, %2}
    rol{w}\\t{%b2, %0|%0, %b2}"
@@ -6081,18 +6186,26 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
        (rotate:HI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ROTATE, HImode, operands)"
   "@
    rol{w}\\t{%2, %0|%0, %2}
    rol{w}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "rotlqi3"
+(define_expand "rotlqi3"
+  [(set (match_operand:QI 0 "nonimmediate_operand" "")
+       (rotate:QI (match_operand:QI 1 "nonimmediate_operand" "")
+                  (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ROTATE, QImode, operands); DONE;")
+
+(define_insn "*rotlqi3_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,qm")
        (rotate:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
                   (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ROTATE, QImode, operands)"
   "@
    rol{b}\\t{%2, %0|%0, %2}
    rol{b}\\t{%b2, %0|%0, %b2}"
@@ -6106,18 +6219,26 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
        (rotate:QI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ROTATE, QImode, operands)"
   "@
    rol{b}\\t{%2, %0|%0, %2}
    rol{b}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "rotrsi3"
+(define_expand "rotrsi3"
+  [(set (match_operand:SI 0 "nonimmediate_operand" "")
+       (rotatert:SI (match_operand:SI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ROTATERT, SImode, operands); DONE;")
+
+(define_insn "*rotrsi3_1"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
        (rotatert:SI (match_operand:SI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ROTATERT, SImode, operands)"
   "@
    ror{l}\\t{%2, %0|%0, %2}
    ror{l}\\t{%b2, %0|%0, %b2}"
@@ -6131,18 +6252,26 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm,rm")
        (rotatert:SI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ROTATERT, SImode, operands)"
   "@
    ror{l}\\t{%2, %0|%0, %2}
    ror{l}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "rotrhi3"
+(define_expand "rotrhi3"
+  [(set (match_operand:HI 0 "nonimmediate_operand" "")
+       (rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ROTATERT, HImode, operands); DONE;")
+
+(define_insn "*rotrhi3"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
        (rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ROTATERT, HImode, operands)"
   "@
    ror{w}\\t{%2, %0|%0, %2}
    ror{w}\\t{%b2, %0|%0, %b2}"
@@ -6156,18 +6285,26 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm,rm")
        (rotatert:HI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ROTATERT, HImode, operands)"
   "@
    ror{w}\\t{%2, %0|%0, %2}
    ror{w}\\t{%b2, %0|%0, %b2}"
   [(set_attr "type" "ishift")])
 
-(define_insn "rotrqi3"
+(define_expand "rotrqi3"
+  [(set (match_operand:QI 0 "nonimmediate_operand" "")
+       (rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "")
+                    (match_operand:QI 2 "nonmemory_operand" "")))
+   (clobber (reg:CC 17))]
+  ""
+  "ix86_expand_binary_operator (ROTATERT, QImode, operands); DONE;")
+
+(define_insn "*rotrqi3_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,qm")
        (rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "0,0")
                     (match_operand:QI 2 "nonmemory_operand" "I,c")))
    (clobber (reg:CC 17))]
-  ""
+  "ix86_binary_operator_ok (ROTATERT, QImode, operands)"
   "@
    ror{b}\\t{%2, %0|%0, %2}
    ror{b}\\t{%b2, %0|%0, %b2}"
@@ -6181,7 +6318,7 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=rm,rm")
        (rotatert:QI (match_dup 1) (match_dup 2)))]
-  ""
+  "ix86_binary_operator_ok (ROTATERT, QImode, operands)"
   "@
    ror{b}\\t{%2, %0|%0, %2}
    ror{b}\\t{%b2, %0|%0, %b2}"
@@ -7964,7 +8101,8 @@
                                [(reg 17) (const_int 0)])
                      (match_operand:SI 2 "nonimmediate_operand" "rm,0")
                      (match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
-  "TARGET_CMOVE"
+  "TARGET_CMOVE
+   && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
   "@
    cmov%C1\\t{%2, %0|%0, %2}
    cmov%c1\\t{%3, %0|%0, %3}"
@@ -7976,7 +8114,8 @@
                                [(reg:CC 17) (const_int 0)])
                      (match_operand:SI 2 "nonimmediate_operand" "rm,0")
                      (match_operand:SI 3 "nonimmediate_operand" "0,rm")))]
-  "TARGET_CMOVE"
+  "TARGET_CMOVE
+   && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
   "@
    cmov%C1\\t{%2, %0|%0, %2}
    cmov%c1\\t{%3, %0|%0, %3}"
@@ -7996,7 +8135,8 @@
                                [(reg 17) (const_int 0)])
                      (match_operand:HI 2 "nonimmediate_operand" "rm,0")
                      (match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
-  "TARGET_CMOVE"
+  "TARGET_CMOVE
+   && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
   "@
    cmov%C1\\t{%2, %0|%0, %2}
    cmov%c1\\t{%3, %0|%0, %3}"
@@ -8008,7 +8148,8 @@
                                [(reg:CC 17) (const_int 0)])
                      (match_operand:HI 2 "nonimmediate_operand" "rm,0")
                      (match_operand:HI 3 "nonimmediate_operand" "0,rm")))]
-  "TARGET_CMOVE"
+  "TARGET_CMOVE
+   && (GET_CODE (operands[2]) != MEM || GET_CODE (operands[3]) != MEM)"
   "@
    cmov%C1\\t{%2, %0|%0, %2}
    cmov%c1\\t{%3, %0|%0, %3}"