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radeon/llvm: Only support 512 constant registers on R600
authorTom Stellard <thomas.stellard@amd.com>
Wed, 19 Sep 2012 16:23:20 +0000 (12:23 -0400)
committerTom Stellard <thomas.stellard@amd.com>
Wed, 19 Sep 2012 17:11:36 +0000 (13:11 -0400)
This is necessary upcoming encoding changes, since we will only be
using 9-bits for register encoding.

src/gallium/drivers/radeon/R600GenRegisterInfo.pl patch | blob | history

diff --git a/src/gallium/drivers/radeon/R600GenRegisterInfo.pl b/src/gallium/drivers/radeon/R600GenRegisterInfo.pl
index a28a3ad1d933aba8cfa3de71e9dd23107e9096c5..c0a05f54cae926d30eeea58d682722f7e63ebbbe 100644 (file)
--- a/src/gallium/drivers/radeon/R600GenRegisterInfo.pl
+++ b/src/gallium/drivers/radeon/R600GenRegisterInfo.pl
@@ -16,7 +16,7 @@
 use strict;
 use warnings;
 
-use constant CONST_REG_COUNT => 1024;
+use constant CONST_REG_COUNT => 512;
 use constant TEMP_REG_COUNT => 128;
 
 my $CREG_MAX = CONST_REG_COUNT - 1;