pr26350.c: New.

        * gcc.target/powerpc/pr26350.c: New.
        * gcc.target/powerpc/indexed-addr.c: New.

From-SVN: r112176

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 63fa39dbf52d9f55b0c7eb4755156e9820647c4f..1dca3d2db0c9061713c46c3adbd2b80efe2d407d 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-03-17  David Edelsohn  <edelsohn@gnu.org>
+
+       * gcc.target/powerpc/pr26350.c: New.
+       * gcc.target/powerpc/indexed-addr.c: New.
+
 2006-03-16  Roger Sayle  <roger@eyesopen.com>
 
        * gfortran.dg/dependency_13.f90: New test case.

diff --git a/gcc/testsuite/gcc.target/powerpc/indexed-addr.c b/gcc/testsuite/gcc.target/powerpc/indexed-addr.c
new file mode 100644 (file)
index 0000000..6933b23
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/indexed-addr.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-options "-O2" } */
+
+/* { dg-final { scan-assembler "3,\.*3,\.*4" } }
+
+/* Ensure that indexed address are output with base address in rA position
+   and index in rB position.  */
+
+char
+do_one (char *base, unsigned long offset)
+{
+  return base[offset];
+}
+

diff --git a/gcc/testsuite/gcc.target/powerpc/pr26350.c b/gcc/testsuite/gcc.target/powerpc/pr26350.c
new file mode 100644 (file)
index 0000000..6b4b206
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr26350.c
@@ -0,0 +1,29 @@
+/* { dg-do compile { target { powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* powerpc*-*-linux* } } } */
+/* { dg-options "-O2 -mlong-double-128 -fpic" } */
+
+typedef int int32_t __attribute__ ((__mode__ (__SI__)));
+typedef unsigned char uint8_t;
+typedef unsigned int uint32_t;
+typedef struct REGS REGS;
+typedef union { uint32_t F; } FW;
+typedef union { struct { FW L; } F; } DW;
+typedef struct _PSW {
+  DW ia;
+} PSW;
+struct REGS {
+  PSW psw;
+  DW cr[16];
+};
+struct ebfp {
+  long double v;
+};
+
+void s390_convert_fix32_to_bfp_ext_reg (REGS *regs)
+{
+  struct ebfp op1;
+  int32_t op2;
+  ((regs))->psw.ia.F.L.F += (4);
+  if(!((regs)->cr[(0)].F.L.F & 0x00040000))
+    op1.v = (long double)op2;
+  put_ebfp(&op1);
+}