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Log RAM signals
author
Jean THOMAS
<git0@pub.jeanthomas.me>
Wed, 15 Jul 2020 10:18:28 +0000
(12:18 +0200)
committer
Jean THOMAS
<git0@pub.jeanthomas.me>
Wed, 15 Jul 2020 10:18:28 +0000
(12:18 +0200)
gram/simulation/simsoctb.v
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diff --git
a/gram/simulation/simsoctb.v
b/gram/simulation/simsoctb.v
index f8e41995d7657ff1d02a8e4a245306e27b1b0a76..74395a158181d9ae17b886873c414fd1f7fa0a86 100644
(file)
--- a/
gram/simulation/simsoctb.v
+++ b/
gram/simulation/simsoctb.v
@@
-103,6
+103,7
@@
module simsoctb;
$dumpvars(0, uart_rx);
$dumpvars(0, uart_tx);
$dumpvars(0, simsoctop);
+ $dumpvars(0, ram_chip);
#simticks $finish;
end