build.res: use ConstraintError iff a constraint invariant is violated.

In particular don't use it for type errors.

diff --git a/nmigen/build/__init__.py b/nmigen/build/__init__.py
index 21ed40b0df6e17e040c1632968f484939aaf25df..d13f3cd615b4a94aa01eeef1aa73cb3d8d73c49b 100644 (file)
--- a/nmigen/build/__init__.py
+++ b/nmigen/build/__init__.py
@@ -1,2 +1,3 @@
 from .dsl import Pins, DiffPairs, Subsignal, Resource, Connector
+from .res import ConstraintError
 from .plat import Platform, TemplatedPlatform

diff --git a/nmigen/build/res.py b/nmigen/build/res.py
index bc388bef41cc7920b4a1e07bc71d06446ef0a4ed..d1e4a4e18ed85ab5332ad7ab71304c53d31f7c73 100644 (file)
--- a/nmigen/build/res.py
+++ b/nmigen/build/res.py
@@ -56,9 +56,9 @@ class ConstraintManager:
     def add_clock(self, name, number, frequency):
         resource = self.lookup(name, number)
         if isinstance(resource.io[0], Subsignal):
-            raise ConstraintError("Cannot constrain frequency of resource {}#{} because it has "
-                                  "subsignals"
-                                  .format(resource.name, resource.number, frequency))
+            raise TypeError("Cannot constrain frequency of resource {}#{} because it has "
+                            "subsignals"
+                            .format(resource.name, resource.number, frequency))
         if (resource.name, resource.number) in self.clocks:
             other = self.clocks[resource.name, resource.number]
             raise ConstraintError("Resource {}#{} is already constrained to a frequency of "
@@ -68,8 +68,8 @@ class ConstraintManager:
 
     def lookup(self, name, number=0):
         if (name, number) not in self.resources:
-            raise NameError("Resource {}#{} does not exist"
-                            .format(name, number))
+            raise ConstraintError("Resource {}#{} does not exist"
+                                  .format(name, number))
         return self.resources[name, number]
 
     def request(self, name, number=0, *, dir=None, xdr=None):

diff --git a/nmigen/test/test_build_res.py b/nmigen/test/test_build_res.py
index ace1c118ac994c488c6dc43ac802af744b5fe643..97fa337870cac7e5299382471cade636fb7c3787 100644 (file)
--- a/nmigen/test/test_build_res.py
+++ b/nmigen/test/test_build_res.py
@@ -192,12 +192,12 @@ class ConstraintManagerTestCase(FHDLTestCase):
             self.cm.add_connectors([Connector("pmod", 0, "1 2")])
 
     def test_wrong_lookup(self):
-        with self.assertRaises(NameError,
+        with self.assertRaises(ConstraintError,
                 msg="Resource user_led#1 does not exist"):
             r = self.cm.lookup("user_led", 1)
 
     def test_wrong_frequency_subsignals(self):
-        with self.assertRaises(ConstraintError,
+        with self.assertRaises(TypeError,
                 msg="Cannot constrain frequency of resource i2c#0 because "
                     "it has subsignals"):
             self.cm.add_clock("i2c", 0, 10e6)