gallium/radeon: allow the winsys to choose the IB size

Picked from the amdgpu branch.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c
index baf05cea965226cd46b050ee67fd0570d4dad0b7..6ea8f24cc140b388285044beedd898b1e5dc2e80 100644 (file)
--- a/src/gallium/drivers/r300/r300_blit.c
+++ b/src/gallium/drivers/r300/r300_blit.c
@@ -382,7 +382,7 @@ static void r300_clear(struct pipe_context* pipe,
             r300_get_num_cs_end_dwords(r300);
 
         /* Reserve CS space. */
-        if (dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) {
+        if (dwords > (r300->cs->max_dw - r300->cs->cdw)) {
             r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
         }
 

diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h
index 37f9641ab3e0e3a3fc348210b4fd565f2ffb43c4..fc150542d4bc857f378a2af1174f236dd6194971 100644 (file)
--- a/src/gallium/drivers/r300/r300_cs.h
+++ b/src/gallium/drivers/r300/r300_cs.h
@@ -46,7 +46,7 @@
 #ifdef DEBUG
 
 #define BEGIN_CS(size) do { \
-    assert(size <= (RADEON_MAX_CMDBUF_DWORDS - cs_copy->cdw)); \
+    assert(size <= (cs_copy->max_dw - cs_copy->cdw)); \
     cs_count = size; \
 } while (0)
 

diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c
index 9dffa4935a3822f793c47a17bd642f55b1db4552..0487b11e775ba55a94b5988cb6d4efa83a71050c 100644 (file)
--- a/src/gallium/drivers/r300/r300_render.c
+++ b/src/gallium/drivers/r300/r300_render.c
@@ -215,7 +215,7 @@ static boolean r300_reserve_cs_dwords(struct r300_context *r300,
     cs_dwords += r300_get_num_cs_end_dwords(r300);
 
     /* Reserve requested CS space. */
-    if (cs_dwords > (RADEON_MAX_CMDBUF_DWORDS - r300->cs->cdw)) {
+    if (cs_dwords > (r300->cs->max_dw - r300->cs->cdw)) {
         r300_flush(&r300->context, RADEON_FLUSH_ASYNC, NULL);
         flushed = TRUE;
     }

diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 9155707f86642d8fb676b7a464eb94c252a55095..ad11e760781739c4c2a64bb040aec062e0e62ed1 100644 (file)
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -93,7 +93,7 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
        num_dw += 10;
 
        /* Flush if there's not enough space. */
-       if (num_dw > RADEON_MAX_CMDBUF_DWORDS) {
+       if (num_dw > ctx->b.rings.gfx.cs->max_dw) {
                ctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
        }
 }

diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 991fda894ace6efdb03db6e5b6db1900812ce883..bcb9390f3312138bc406458f875051aaa9c245bc 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -493,7 +493,7 @@ struct r600_context {
 static inline void r600_emit_command_buffer(struct radeon_winsys_cs *cs,
                                            struct r600_command_buffer *cb)
 {
-       assert(cs->cdw + cb->num_dw <= RADEON_MAX_CMDBUF_DWORDS);
+       assert(cs->cdw + cb->num_dw <= cs->max_dw);
        memcpy(cs->buf + cs->cdw, cb->buf, 4 * cb->num_dw);
        cs->cdw += cb->num_dw;
 }
@@ -826,7 +826,7 @@ static inline void r600_write_compute_context_reg_seq(struct radeon_winsys_cs *c
 static inline void r600_write_ctl_const_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
 {
        assert(reg >= R600_CTL_CONST_OFFSET);
-       assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS);
+       assert(cs->cdw+2+num <= cs->max_dw);
        cs->buf[cs->cdw++] = PKT3(PKT3_SET_CTL_CONST, num, 0);
        cs->buf[cs->cdw++] = (reg - R600_CTL_CONST_OFFSET) >> 2;
 }

diff --git a/src/gallium/drivers/radeon/r600_cs.h b/src/gallium/drivers/radeon/r600_cs.h
index d6d4c88fbf6c4626e6bb9fc66e3d185e5ac7f5a0..03a04b754d6bf869e1371fed9f42b3242e4b407d 100644 (file)
--- a/src/gallium/drivers/radeon/r600_cs.h
+++ b/src/gallium/drivers/radeon/r600_cs.h
@@ -77,7 +77,7 @@ static inline void r600_emit_reloc(struct r600_common_context *rctx,
 static inline void r600_write_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
 {
        assert(reg < R600_CONTEXT_REG_OFFSET);
-       assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS);
+       assert(cs->cdw+2+num <= cs->max_dw);
        radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0));
        radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2);
 }
@@ -91,7 +91,7 @@ static inline void r600_write_config_reg(struct radeon_winsys_cs *cs, unsigned r
 static inline void r600_write_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
 {
        assert(reg >= R600_CONTEXT_REG_OFFSET);
-       assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS);
+       assert(cs->cdw+2+num <= cs->max_dw);
        radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0));
        radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2);
 }
@@ -105,7 +105,7 @@ static inline void r600_write_context_reg(struct radeon_winsys_cs *cs, unsigned
 static inline void si_write_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
 {
        assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END);
-       assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS);
+       assert(cs->cdw+2+num <= cs->max_dw);
        radeon_emit(cs, PKT3(PKT3_SET_SH_REG, num, 0));
        radeon_emit(cs, (reg - SI_SH_REG_OFFSET) >> 2);
 }
@@ -119,7 +119,7 @@ static inline void si_write_sh_reg(struct radeon_winsys_cs *cs, unsigned reg, un
 static inline void cik_write_uconfig_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
 {
        assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END);
-       assert(cs->cdw+2+num <= RADEON_MAX_CMDBUF_DWORDS);
+       assert(cs->cdw+2+num <= cs->max_dw);
        radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, num, 0));
        radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2);
 }

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index c940f6d35c2ed78f718b0c8dc52599e7009c8e83..79b4b544004f3f2572236118959ee17ecf65381c 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -108,9 +108,9 @@ void r600_draw_rectangle(struct blitter_context *blitter,
 void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw)
 {
        /* Flush if there's not enough space. */
-       if ((num_dw + ctx->rings.dma.cs->cdw) > RADEON_MAX_CMDBUF_DWORDS) {
+       if ((num_dw + ctx->rings.dma.cs->cdw) > ctx->rings.dma.cs->max_dw) {
                ctx->rings.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
-               assert((num_dw + ctx->rings.dma.cs->cdw) <= RADEON_MAX_CMDBUF_DWORDS);
+               assert((num_dw + ctx->rings.dma.cs->cdw) <= ctx->rings.dma.cs->max_dw);
        }
 }
 

diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index dabee534fe3e9ab749179c511c441bd60387e1c6..c79a0823ad089cab73ed97881a89f546328279dc 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -42,8 +42,6 @@
 
 #include "pipebuffer/pb_buffer.h"
 
-#define RADEON_MAX_CMDBUF_DWORDS (16 * 1024)
-
 #define RADEON_FLUSH_ASYNC             (1 << 0)
 #define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1) /* needs DRM 2.12.0 */
 #define RADEON_FLUSH_COMPUTE           (1 << 2)
@@ -196,6 +194,7 @@ struct radeon_winsys_cs_handle;
 
 struct radeon_winsys_cs {
     unsigned                    cdw;  /* Number of used dwords. */
+    unsigned                    max_dw; /* Maximum number of dwords. */
     uint32_t                    *buf; /* The command buffer. */
     enum ring_type              ring_type;
 };

diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index b80245c97850c8d241d6f5ad0284eda053eb4d9a..3203ceb61fddad879f1f746066481f94b9aa2d61 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -86,7 +86,7 @@ void si_need_cs_space(struct si_context *ctx, unsigned num_dw,
 #endif
 
        /* Flush if there's not enough space. */
-       if (num_dw > RADEON_MAX_CMDBUF_DWORDS) {
+       if (num_dw > ctx->b.rings.gfx.cs->max_dw) {
                ctx->b.rings.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
        }
 }

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index d618f5904fd6c80e54d7857653da799503705602..e363cc042ddd393642615c626fc495c76c196bfd 100644 (file)
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -188,6 +188,7 @@ radeon_drm_cs_create(struct radeon_winsys *rws,
     cs->cst = &cs->csc2;
     cs->base.buf = cs->csc->buf;
     cs->base.ring_type = ring_type;
+    cs->base.max_dw = ARRAY_SIZE(cs->csc->buf);
 
     p_atomic_inc(&ws->num_cs);
     return &cs->base;
@@ -467,7 +468,7 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
         break;
     }
 
-    if (rcs->cdw > RADEON_MAX_CMDBUF_DWORDS) {
+    if (rcs->cdw > rcs->max_dw) {
        fprintf(stderr, "radeon: command stream overflowed\n");
     }
 
@@ -486,7 +487,7 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs,
     cs->cst->cs_trace_id = cs_trace_id;
 
     /* If the CS is not empty or overflowed, emit it in a separate thread. */
-    if (cs->base.cdw && cs->base.cdw <= RADEON_MAX_CMDBUF_DWORDS && !debug_get_option_noop()) {
+    if (cs->base.cdw && cs->base.cdw <= cs->base.max_dw && !debug_get_option_noop()) {
         unsigned i, crelocs;
 
         crelocs = cs->cst->crelocs;

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
index 658057d75b341c992f3a422c09f57285283cd0f0..6ceb8e98ee71959de92378b87724f7fe653bea3a 100644 (file)
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.h
@@ -30,7 +30,7 @@
 #include "radeon_drm_bo.h"
 
 struct radeon_cs_context {
-    uint32_t                    buf[RADEON_MAX_CMDBUF_DWORDS];
+    uint32_t                    buf[16 * 1024];
 
     int                         fd;
     struct drm_radeon_cs        cs;