mem: Extend DRAM row bits from 16 to 32 for larger densities

This patch extends the DRAM row bits to 32 to support larger density
memories. Additional checks are also added to ensure the row fits in
the 32 bits.

diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index dc47818e3a3c8e0224dacf23ff98bc2a02b0ecfe..e4248b3375995e77c447bed600c43b930760999c 100644 (file)
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -215,7 +215,9 @@ DRAMCtrl::decodeAddr(PacketPtr pkt, Addr dramPktAddr, unsigned size,
     // channel, respectively
     uint8_t rank;
     uint8_t bank;
-    uint16_t row;
+    // use a 64-bit unsigned during the computations as the row is
+    // always the top bits, and check before creating the DRAMPacket
+    uint64_t row;
 
     // truncate the address to the access granularity
     Addr addr = dramPktAddr / burstSize;
@@ -294,6 +296,7 @@ DRAMCtrl::decodeAddr(PacketPtr pkt, Addr dramPktAddr, unsigned size,
     assert(rank < ranksPerChannel);
     assert(bank < banksPerRank);
     assert(row < rowsPerBank);
+    assert(row < Bank::NO_ROW);
 
     DPRINTF(DRAM, "Address: %lld Rank %d Bank %d Row %d\n",
             dramPktAddr, rank, bank, row);
@@ -750,7 +753,7 @@ DRAMCtrl::accessAndRespond(PacketPtr pkt, Tick static_latency)
 
 void
 DRAMCtrl::activateBank(Tick act_tick, uint8_t rank, uint8_t bank,
-                       uint16_t row, Bank& bank_ref)
+                       uint32_t row, Bank& bank_ref)
 {
     assert(0 <= rank && rank < ranksPerChannel);
     assert(actTicks[rank].size() == activationLimit);

diff --git a/src/mem/dram_ctrl.hh b/src/mem/dram_ctrl.hh
index 0dbff7eaf58593bae771e163f5eecc7aa1b43254..c8104a49d3884ba227179b795c6c760103474220 100644 (file)
--- a/src/mem/dram_ctrl.hh
+++ b/src/mem/dram_ctrl.hh
@@ -211,7 +211,7 @@ class DRAMCtrl : public AbstractMemory
         /** Will be populated by address decoder */
         const uint8_t rank;
         const uint8_t bank;
-        const uint16_t row;
+        const uint32_t row;
 
         /**
          * Bank id is calculated considering banks in all the ranks
@@ -242,7 +242,7 @@ class DRAMCtrl : public AbstractMemory
         Bank& bankRef;
 
         DRAMPacket(PacketPtr _pkt, bool is_read, uint8_t _rank, uint8_t _bank,
-                   uint16_t _row, uint16_t bank_id, Addr _addr,
+                   uint32_t _row, uint16_t bank_id, Addr _addr,
                    unsigned int _size, Bank& bank_ref)
             : entryTime(curTick()), readyTime(curTick()),
               pkt(_pkt), isRead(is_read), rank(_rank), bank(_bank), row(_row),
@@ -394,7 +394,7 @@ class DRAMCtrl : public AbstractMemory
      * @param bank_ref Reference to the bank
      */
     void activateBank(Tick act_tick, uint8_t rank, uint8_t bank,
-                      uint16_t row, Bank& bank_ref);
+                      uint32_t row, Bank& bank_ref);
 
     /**
      * Precharge a given bank and also update when the precharge is