* Temporarily move a block into a MSHR.
* @todo Remove this when LSQ/SB are fixed and implemented in memtest.
*/
- void pseudoFill(Addr addr, int asid);
+ void pseudoFill(Addr addr);
/**
* Temporarily move a block into an existing MSHR.
* @param asid The address space ID of the address.
* @todo Is this function necessary?
*/
- void invalidateBlk(Addr addr, int asid);
+ void invalidateBlk(Addr addr);
/**
* Squash all requests associated with specified thread.
&& !pkt->isWrite()) {
//Upgrade or Invalidate
//Look into what happens if two slave caches on bus
- DPRINTF(Cache, "%s %d %x ? blk_addr: %x\n", pkt->cmdString(),
- pkt->req->getAsid(), pkt->getAddr() & (((ULL(1))<<48)-1),
+ DPRINTF(Cache, "%s %x ? blk_addr: %x\n", pkt->cmdString(),
+ pkt->getAddr() & (((ULL(1))<<48)-1),
pkt->getAddr() & ~((Addr)blkSize - 1));
//@todo Should this return latency have the hit latency in it?
if (!blk && pkt->getSize() >= blkSize && coherence->allowFastWrites() &&
(pkt->cmd == Packet::WriteReq || pkt->cmd == Packet::WriteInvalidateReq) ) {
// not outstanding misses, can do this
- MSHR* outstanding_miss = missQueue->findMSHR(pkt->getAddr(), pkt->req->getAsid());
+ MSHR* outstanding_miss = missQueue->findMSHR(pkt->getAddr());
if (pkt->cmd == Packet::WriteInvalidateReq || !outstanding_miss) {
if (outstanding_miss) {
warn("WriteInv doing a fastallocate"
missQueue->doWriteback(writebacks.front());
writebacks.pop_front();
}
- DPRINTF(Cache, "%s %d %x %s blk_addr: %x pc %x\n", pkt->cmdString(),
- pkt->req->getAsid(), pkt->getAddr() & (((ULL(1))<<48)-1), (blk) ? "hit" : "miss",
+ DPRINTF(Cache, "%s %x %s blk_addr: %x pc %x\n", pkt->cmdString(),
+ pkt->getAddr() & (((ULL(1))<<48)-1), (blk) ? "hit" : "miss",
pkt->getAddr() & ~((Addr)blkSize - 1), pkt->req->getPC());
if (blk) {
// Hit
template<class TagStore, class Buffering, class Coherence>
void
-Cache<TagStore,Buffering,Coherence>::pseudoFill(Addr addr, int asid)
+Cache<TagStore,Buffering,Coherence>::pseudoFill(Addr addr)
{
// Need to temporarily move this blk into MSHRs
- MSHR *mshr = missQueue->allocateTargetList(addr, asid);
+ MSHR *mshr = missQueue->allocateTargetList(addr);
int lat;
PacketList dummy;
// Read the data into the mshr
// can overload order since it isn't used on non pending blocks
mshr->order = blk->status;
// temporarily remove the block from the cache.
- tags->invalidateBlk(addr, asid);
+ tags->invalidateBlk(addr);
}
template<class TagStore, class Buffering, class Coherence>
// can overload order since it isn't used on non pending blocks
mshr->order = blk->status;
// temporarily remove the block from the cache.
- tags->invalidateBlk(mshr->pkt->getAddr(), mshr->pkt->req->getAsid());
+ tags->invalidateBlk(mshr->pkt->getAddr());
}
Addr blk_addr = pkt->getAddr() & ~(Addr(blkSize-1));
BlkType *blk = tags->findBlock(pkt);
- MSHR *mshr = missQueue->findMSHR(blk_addr, pkt->req->getAsid());
+ MSHR *mshr = missQueue->findMSHR(blk_addr);
if (isTopLevel() && coherence->hasProtocol()) { //@todo Move this into handle bus req
//If we find an mshr, and it is in service, we need to NACK or invalidate
if (mshr) {
}
//We also need to check the writeback buffers and handle those
std::vector<MSHR *> writebacks;
- if (missQueue->findWrites(blk_addr, pkt->req->getAsid(), writebacks)) {
+ if (missQueue->findWrites(blk_addr, writebacks)) {
DPRINTF(Cache, "Snoop hit in writeback to blk_addr: %x\n", pkt->getAddr() & (((ULL(1))<<48)-1));
//Look through writebacks for any non-uncachable writes, use that
template<class TagStore, class Buffering, class Coherence>
void
-Cache<TagStore,Buffering,Coherence>::invalidateBlk(Addr addr, int asid)
+Cache<TagStore,Buffering,Coherence>::invalidateBlk(Addr addr)
{
- tags->invalidateBlk(addr,asid);
+ tags->invalidateBlk(addr);
}
if (pkt->isInvalidate() && !pkt->isRead()
&& !pkt->isWrite()) {
//Upgrade or Invalidate, satisfy it, don't forward
- DPRINTF(Cache, "%s %d %x ? blk_addr: %x\n", pkt->cmdString(),
- pkt->req->getAsid(), pkt->getAddr() & (((ULL(1))<<48)-1),
+ DPRINTF(Cache, "%s %x ? blk_addr: %x\n", pkt->cmdString(),
+ pkt->getAddr() & (((ULL(1))<<48)-1),
pkt->getAddr() & ~((Addr)blkSize - 1));
pkt->flags |= SATISFIED;
return 0;
Addr blk_addr = pkt->getAddr() & ~(blkSize - 1);
// There can only be one matching outstanding miss.
- MSHR* mshr = missQueue->findMSHR(blk_addr, pkt->req->getAsid());
+ MSHR* mshr = missQueue->findMSHR(blk_addr);
// There can be many matching outstanding writes.
std::vector<MSHR*> writes;
- missQueue->findWrites(blk_addr, pkt->req->getAsid(), writes);
+ missQueue->findWrites(blk_addr, writes);
if (!update) {
memSidePort->sendFunctional(pkt);
{
Addr blk_addr = pkt->getAddr() & ~(Addr(blkSize-1));
BlkType *blk = tags->findBlock(pkt);
- MSHR *mshr = missQueue->findMSHR(blk_addr, pkt->req->getAsid());
+ MSHR *mshr = missQueue->findMSHR(blk_addr);
CacheBlk::State new_state = 0;
bool satisfy = coherence->handleBusRequest(pkt,blk,mshr, new_state);
if (satisfy) {
if (!pkt->needsResponse()) {
wb.allocateAsBuffer(pkt);
} else {
- wb.allocate(pkt->cmd, blk_addr, pkt->req->getAsid(), blk_size, pkt);
+ wb.allocate(pkt->cmd, blk_addr, blk_size, pkt);
}
memcpy(wb.pkt->getPtr<uint8_t>(), pkt->getPtr<uint8_t>(), blk_size);
if (!pkt->needsResponse()) {
miss.allocateAsBuffer(pkt);
} else {
- miss.allocate(pkt->cmd, blk_addr, pkt->req->getAsid(), blk_size, pkt);
+ miss.allocate(pkt->cmd, blk_addr, blk_size, pkt);
}
if (!pkt->req->isUncacheable()) {
miss.pkt->flags |= CACHE_LINE_FILL;
}
void
-BlockingBuffer::doWriteback(Addr addr, int asid,
+BlockingBuffer::doWriteback(Addr addr,
int size, uint8_t *data, bool compressed)
{
// Generate request
* @param time The time the miss is detected.
* @param target The target for the fetch.
*/
- MSHR* fetchBlock(Addr addr, int asid, int blk_size, Tick time,
+ MSHR* fetchBlock(Addr addr, int blk_size, Tick time,
Packet * &target)
{
fatal("Unimplemented");
* @param asid The address space id.
* @return A pointer to miss if it matches.
*/
- MSHR* findMSHR(Addr addr, int asid)
+ MSHR* findMSHR(Addr addr)
{
if (miss.addr == addr && miss.pkt)
return &miss;
* @param writes List of pointers to the matching writes.
* @return True if there is a matching write.
*/
- bool findWrites(Addr addr, int asid, std::vector<MSHR*>& writes)
+ bool findWrites(Addr addr, std::vector<MSHR*>& writes)
{
if (wb.addr == addr && wb.pkt) {
writes.push_back(&wb);
* @param data The data to write, can be NULL.
* @param compressed True if the data is compressed.
*/
- void doWriteback(Addr addr, int asid,
+ void doWriteback(Addr addr,
int size, uint8_t *data, bool compressed);
/**
/**
* Dummy implmentation.
*/
- MSHR* allocateTargetList(Addr addr, int asid)
+ MSHR* allocateTargetList(Addr addr)
{
fatal("Unimplemented");
}
Addr blkAddr = pkt->getAddr() & ~(Addr)(blkSize-1);
MSHR* mshr = NULL;
if (!pkt->req->isUncacheable()) {
- mshr = mq.findMatch(blkAddr, pkt->req->getAsid());
+ mshr = mq.findMatch(blkAddr);
if (mshr) {
//@todo remove hw_pf here
mshr_hits[pkt->cmdToIndex()][pkt->req->getThreadNum()]++;
}
MSHR*
-MissQueue::fetchBlock(Addr addr, int asid, int blk_size, Tick time,
+MissQueue::fetchBlock(Addr addr, int blk_size, Tick time,
Packet * &target)
{
Addr blkAddr = addr & ~(Addr)(blk_size - 1);
- assert(mq.findMatch(addr, asid) == NULL);
- MSHR *mshr = mq.allocateFetch(blkAddr, asid, blk_size, target);
+ assert(mq.findMatch(addr) == NULL);
+ MSHR *mshr = mq.allocateFetch(blkAddr, blk_size, target);
mshr->order = order++;
mshr->pkt->flags |= CACHE_LINE_FILL;
if (mq.isFull()) {
}
MSHR*
-MissQueue::findMSHR(Addr addr, int asid) const
+MissQueue::findMSHR(Addr addr) const
{
- return mq.findMatch(addr,asid);
+ return mq.findMatch(addr);
}
bool
-MissQueue::findWrites(Addr addr, int asid, vector<MSHR*> &writes) const
+MissQueue::findWrites(Addr addr, vector<MSHR*> &writes) const
{
- return wb.findMatches(addr,asid,writes);
+ return wb.findMatches(addr,writes);
}
void
-MissQueue::doWriteback(Addr addr, int asid,
+MissQueue::doWriteback(Addr addr,
int size, uint8_t *data, bool compressed)
{
// Generate request
MSHR*
-MissQueue::allocateTargetList(Addr addr, int asid)
+MissQueue::allocateTargetList(Addr addr)
{
- MSHR* mshr = mq.allocateTargetList(addr, asid, blkSize);
+ MSHR* mshr = mq.allocateTargetList(addr, blkSize);
mshr->pkt->flags |= CACHE_LINE_FILL;
if (mq.isFull()) {
cache->setBlocked(Blocked_NoMSHRs);
* @param time The time the miss is detected.
* @param target The target for the fetch.
*/
- MSHR* fetchBlock(Addr addr, int asid, int blk_size, Tick time,
+ MSHR* fetchBlock(Addr addr, int blk_size, Tick time,
Packet * &target);
/**
* @warning Currently only searches the miss queue. If non write allocate
* might need to search the write buffer for coherence.
*/
- MSHR* findMSHR(Addr addr, int asid) const;
+ MSHR* findMSHR(Addr addr) const;
/**
* Searches for the supplied address in the write buffer.
* @param writes The list of writes that match the address.
* @return True if any writes are found
*/
- bool findWrites(Addr addr, int asid, std::vector<MSHR*>& writes) const;
+ bool findWrites(Addr addr, std::vector<MSHR*>& writes) const;
/**
* Perform a writeback of dirty data to the given address.
* @param data The data to write, can be NULL.
* @param compressed True if the data is compressed.
*/
- void doWriteback(Addr addr, int asid,
+ void doWriteback(Addr addr,
int size, uint8_t *data, bool compressed);
/**
* @param asid The address space ID.
* @return A pointer to the allocated MSHR.
*/
- MSHR* allocateTargetList(Addr addr, int asid);
+ MSHR* allocateTargetList(Addr addr);
};
}
void
-MSHR::allocate(Packet::Command cmd, Addr _addr, int _asid, int size,
+MSHR::allocate(Packet::Command cmd, Addr _addr, int size,
Packet * &target)
{
addr = _addr;
MSHR::allocateAsBuffer(Packet * &target)
{
addr = target->getAddr();
- asid = target->req->getAsid();
threadNum = target->req->getThreadNum();
pkt = new Packet(target->req, target->cmd, -1);
pkt->allocate();
{
ccprintf(cerr,
"inService: %d thread: %d\n"
- "Addr: %x asid: %d ntargets %d\n"
+ "Addr: %x ntargets %d\n"
"Targets:\n",
- inService, threadNum, addr, asid, ntargets);
+ inService, threadNum, addr, ntargets);
TargetListIterator tar_it = targets.begin();
for (int i = 0; i < ntargets; i++) {
* @param size The number of bytes to pktuest.
* @param pkt The original miss.
*/
- void allocate(Packet::Command cmd, Addr addr, int asid, int size,
+ void allocate(Packet::Command cmd, Addr addr, int size,
Packet * &pkt);
/**
}
MSHR*
-MSHRQueue::findMatch(Addr addr, int asid) const
+MSHRQueue::findMatch(Addr addr) const
{
MSHR::ConstIterator i = allocatedList.begin();
MSHR::ConstIterator end = allocatedList.end();
}
bool
-MSHRQueue::findMatches(Addr addr, int asid, vector<MSHR*>& matches) const
+MSHRQueue::findMatches(Addr addr, vector<MSHR*>& matches) const
{
// Need an empty vector
assert(matches.empty());
mshr->allocateAsBuffer(pkt);
} else {
assert(size !=0);
- mshr->allocate(pkt->cmd, aligned_addr, pkt->req->getAsid(), size, pkt);
+ mshr->allocate(pkt->cmd, aligned_addr, size, pkt);
allocatedTargets += 1;
}
mshr->allocIter = allocatedList.insert(allocatedList.end(), mshr);
}
MSHR*
-MSHRQueue::allocateFetch(Addr addr, int asid, int size, Packet * &target)
+MSHRQueue::allocateFetch(Addr addr, int size, Packet * &target)
{
MSHR *mshr = freeList.front();
assert(mshr->getNumTargets() == 0);
freeList.pop_front();
- mshr->allocate(Packet::ReadReq, addr, asid, size, target);
+ mshr->allocate(Packet::ReadReq, addr, size, target);
mshr->allocIter = allocatedList.insert(allocatedList.end(), mshr);
mshr->readyIter = pendingList.insert(pendingList.end(), mshr);
}
MSHR*
-MSHRQueue::allocateTargetList(Addr addr, int asid, int size)
+MSHRQueue::allocateTargetList(Addr addr, int size)
{
MSHR *mshr = freeList.front();
assert(mshr->getNumTargets() == 0);
freeList.pop_front();
Packet * dummy;
- mshr->allocate(Packet::ReadReq, addr, asid, size, dummy);
+ mshr->allocate(Packet::ReadReq, addr, size, dummy);
mshr->allocIter = allocatedList.insert(allocatedList.end(), mshr);
mshr->inService = true;
++inServiceMSHRs;
* @param asid The address space id.
* @return Pointer to the matching MSHR, null if not found.
*/
- MSHR* findMatch(Addr addr, int asid) const;
+ MSHR* findMatch(Addr addr) const;
/**
* Find and return all the matching MSHRs in the provided vector.
* @return True if any matches are found, false otherwise.
* @todo Typedef the vector??
*/
- bool findMatches(Addr addr, int asid, std::vector<MSHR*>& matches) const;
+ bool findMatches(Addr addr, std::vector<MSHR*>& matches) const;
/**
* Find any pending pktuests that overlap the given request.
* @param target The first target for the pktuest.
* @return Pointer to the new MSHR.
*/
- MSHR* allocateFetch(Addr addr, int asid, int size, Packet * &target);
+ MSHR* allocateFetch(Addr addr, int size, Packet * &target);
/**
* Allocate a target list for the given address.
* @param size The number of bytes to pktuest.
* @return Pointer to the new MSHR.
*/
- MSHR* allocateTargetList(Addr addr, int asid, int size);
+ MSHR* allocateTargetList(Addr addr, int size);
/**
* Removes the given MSHR from the queue. This places the MSHR on the
}
//Check if it is already in the miss_queue
- if (inMissQueue(prefetch->getAddr(), prefetch->req->getAsid())) {
+ if (inMissQueue(prefetch->getAddr())) {
addr++;
delay++;
continue;
virtual bool inCache(Packet * &pkt) = 0;
- virtual bool inMissQueue(Addr address, int asid) = 0;
+ virtual bool inMissQueue(Addr address) = 0;
std::list<Packet *>::iterator inPrefetch(Addr address);
};
}
bool
-FALRU::probe(int asid, Addr addr) const
+FALRU::probe(Addr addr) const
{
Addr blkAddr = blkAlign(addr);
FALRUBlk* blk = hashLookup(blkAddr);
}
void
-FALRU::invalidateBlk(int asid, Addr addr)
+FALRU::invalidateBlk(Addr addr)
{
Addr blkAddr = blkAlign(addr);
FALRUBlk* blk = (*tagHash.find(blkAddr)).second;
}
FALRUBlk*
-FALRU::findBlock(Addr addr, int asid, int &lat, int *inCache)
+FALRU::findBlock(Addr addr, int &lat, int *inCache)
{
accesses++;
int tmp_in_cache = 0;
}
FALRUBlk*
-FALRU::findBlock(Addr addr, int asid) const
+FALRU::findBlock(Addr addr) const
{
Addr blkAddr = blkAlign(addr);
FALRUBlk* blk = hashLookup(blkAddr);
* @param addr The address to look for.
* @return True if the address is in the cache.
*/
- bool probe(int asid, Addr addr) const;
+ bool probe(Addr addr) const;
/**
* Invalidate the cache block that contains the given addr.
* @param asid The address space ID.
* @param addr The address to invalidate.
*/
- void invalidateBlk(int asid, Addr addr);
+ void invalidateBlk(Addr addr);
/**
* Find the block in the cache and update the replacement data. Returns
* @param inCache The FALRUBlk::inCache flags.
* @return Pointer to the cache block.
*/
- FALRUBlk* findBlock(Addr addr, int asid, int &lat, int *inCache = 0);
+ FALRUBlk* findBlock(Addr addr, int &lat, int *inCache = 0);
/**
* Find the block in the cache and update the replacement data. Returns
* @param asid The address space ID.
* @return Pointer to the cache block.
*/
- FALRUBlk* findBlock(Addr addr, int asid) const;
+ FALRUBlk* findBlock(Addr addr) const;
/**
* Find a replacement block for the address provided.
* @param asid The address space ID.
* @param writebacks List for any generated writeback pktuests.
*/
- void doCopy(Addr source, Addr dest, int asid, PacketList &writebacks)
+ void doCopy(Addr source, Addr dest, PacketList &writebacks)
{
}
// probe cache for presence of given block.
bool
-IIC::probe(int asid, Addr addr) const
+IIC::probe(Addr addr) const
{
- return (findBlock(addr,asid) != NULL);
+ return (findBlock(addr) != NULL);
}
IICTag*
-IIC::findBlock(Addr addr, int asid, int &lat)
+IIC::findBlock(Addr addr, int &lat)
{
Addr tag = extractTag(addr);
unsigned set = hash(addr);
if (PROFILE_IIC)
setAccess.sample(set);
- IICTag *tag_ptr = sets[set].findTag(asid, tag, chain_ptr);
+ IICTag *tag_ptr = sets[set].findTag(tag, chain_ptr);
set_lat = 1;
if (tag_ptr == NULL && chain_ptr != tagNull) {
int secondary_depth;
- tag_ptr = secondaryChain(asid, tag, chain_ptr, &secondary_depth);
+ tag_ptr = secondaryChain(tag, chain_ptr, &secondary_depth);
set_lat += secondary_depth;
// set depth for statistics fix this later!!! egh
sets[set].depth = set_lat;
// need to preserve chain: fix this egh
sets[set].tags[assoc-1]->chain_ptr = tag_ptr->chain_ptr;
tagSwap(tag_ptr - tagStore, sets[set].tags[assoc-1] - tagStore);
- tag_ptr = sets[set].findTag(asid, tag, chain_ptr);
+ tag_ptr = sets[set].findTag(tag, chain_ptr);
assert(tag_ptr!=NULL);
}
IIC::findBlock(Packet * &pkt, int &lat)
{
Addr addr = pkt->getAddr();
- int asid = pkt->req->getAsid();
Addr tag = extractTag(addr);
unsigned set = hash(addr);
if (PROFILE_IIC)
setAccess.sample(set);
- IICTag *tag_ptr = sets[set].findTag(asid, tag, chain_ptr);
+ IICTag *tag_ptr = sets[set].findTag(tag, chain_ptr);
set_lat = 1;
if (tag_ptr == NULL && chain_ptr != tagNull) {
int secondary_depth;
- tag_ptr = secondaryChain(asid, tag, chain_ptr, &secondary_depth);
+ tag_ptr = secondaryChain(tag, chain_ptr, &secondary_depth);
set_lat += secondary_depth;
// set depth for statistics fix this later!!! egh
sets[set].depth = set_lat;
// need to preserve chain: fix this egh
sets[set].tags[assoc-1]->chain_ptr = tag_ptr->chain_ptr;
tagSwap(tag_ptr - tagStore, sets[set].tags[assoc-1] - tagStore);
- tag_ptr = sets[set].findTag(asid, tag, chain_ptr);
+ tag_ptr = sets[set].findTag(tag, chain_ptr);
assert(tag_ptr!=NULL);
}
}
IICTag*
-IIC::findBlock(Addr addr, int asid) const
+IIC::findBlock(Addr addr) const
{
Addr tag = extractTag(addr);
unsigned set = hash(addr);
unsigned long chain_ptr;
- IICTag *tag_ptr = sets[set].findTag(asid, tag, chain_ptr);
+ IICTag *tag_ptr = sets[set].findTag(tag, chain_ptr);
if (tag_ptr == NULL && chain_ptr != tagNull) {
int secondary_depth;
- tag_ptr = secondaryChain(asid, tag, chain_ptr, &secondary_depth);
+ tag_ptr = secondaryChain(tag, chain_ptr, &secondary_depth);
}
return tag_ptr;
}
IICTag *
-IIC::secondaryChain(int asid, Addr tag, unsigned long chain_ptr,
+IIC::secondaryChain(Addr tag, unsigned long chain_ptr,
int *_depth) const
{
int depth = 0;
DPRINTF(IIC,"Searching secondary at %d for %x\n", chain_ptr,
tag<<tagShift);
if (tagStore[chain_ptr].tag == tag &&
- tagStore[chain_ptr].asid == asid &&
(tagStore[chain_ptr].isValid())) {
*_depth = depth;
return &tagStore[chain_ptr];
}
void
-IIC::invalidateBlk(int asid, Addr addr)
+IIC::invalidateBlk(Addr addr)
{
- IICTag* tag_ptr = findBlock(addr, asid);
+ IICTag* tag_ptr = findBlock(addr);
if (tag_ptr) {
for (int i = 0; i < tag_ptr->numData; ++i) {
dataReferenceCount[tag_ptr->data_ptr[i]]--;
* @todo This code can break if the src is evicted to get a tag for the dest.
*/
void
-IIC::doCopy(Addr source, Addr dest, int asid, PacketList &writebacks)
+IIC::doCopy(Addr source, Addr dest, PacketList &writebacks)
{
//Copy unsuported now
#if 0
- IICTag *dest_tag = findBlock(dest, asid);
+ IICTag *dest_tag = findBlock(dest);
if (dest_tag) {
for (int i = 0; i < dest_tag->numData; ++i) {
dest_tag->re = (void*) repl->add(dest_tag - tagStore);
dest_tag->set = hash(dest);
dest_tag->tag = extractTag(dest);
- dest_tag->asid = asid;
dest_tag->status = BlkValid | BlkWritable;
}
// Find the source tag here since it might move if we need to find a
// tag for the destination.
- IICTag *src_tag = findBlock(source, asid);
+ IICTag *src_tag = findBlock(source);
assert(src_tag);
assert(!cache->doData() || src_tag->size <= trivialSize
|| src_tag->numData > 0);
// if reference counter is greater than 1, do copy
// else do write
Addr blk_addr = blkAlign(pkt->getAddr);
- IICTag* blk = findBlock(blk_addr, pkt->req->getAsid());
+ IICTag* blk = findBlock(blk_addr);
if (blk->numData > 0 && dataReferenceCount[blk->data_ptr[0]] != 1) {
// copy the data
/**
* @todo Remove this refetch once we change IIC to pointer based
*/
- blk = findBlock(blk_addr, pkt->req->getAsid());
+ blk = findBlock(blk_addr);
assert(blk);
if (cache->doData()) {
memcpy(&(dataBlks[new_data][0]),
* @param chain_ptr The chain pointer to start the search of the secondary
* @return Pointer to the tag, NULL if not found.
*/
- IICTag* findTag(int asid, Addr tag, unsigned long &chain_ptr)
+ IICTag* findTag( Addr tag, unsigned long &chain_ptr)
{
depth = 1;
for (int i = 0; i < assoc; ++i) {
* @param addr The address to find.
* @return true if it is found.
*/
- bool probe(int asid, Addr addr) const;
+ bool probe(Addr addr) const;
/**
* Swap the position of two tags.
* @param asid The address space ID.
* @param addr The address to invalidate.
*/
- void invalidateBlk(int asid, Addr addr);
+ void invalidateBlk(Addr addr);
/**
* Find the block and update the replacement data. This call also returns
* @param lat The access latency.
* @return A pointer to the block found, if any.
*/
- IICTag* findBlock(Addr addr, int asid, int &lat);
+ IICTag* findBlock(Addr addr, int &lat);
/**
* Find the block and update the replacement data. This call also returns
* @param asid The address space ID.
* @return A pointer to the block found, if any.
*/
- IICTag* findBlock(Addr addr, int asid) const;
+ IICTag* findBlock(Addr addr) const;
/**
* Find a replacement block for the address provided.
* @param asid The address space DI.
* @param writebacks List for any generated writeback pktuests.
*/
- void doCopy(Addr source, Addr dest, int asid, PacketList &writebacks);
+ void doCopy(Addr source, Addr dest, PacketList &writebacks);
/**
* If a block is currently marked copy on write, copy it before writing.
* @param depth The number of hash lookups made while searching.
* @return A pointer to the block if found.
*/
- IICTag *secondaryChain(int asid, Addr tag, unsigned long chain_ptr,
+ IICTag *secondaryChain(Addr tag, unsigned long chain_ptr,
int *depth) const;
/**
using namespace std;
LRUBlk*
-CacheSet::findBlk(int asid, Addr tag) const
+CacheSet::findBlk(Addr tag) const
{
for (int i = 0; i < assoc; ++i) {
if (blks[i]->tag == tag && blks[i]->isValid()) {
// table; won't matter because the block is invalid
blk->tag = j;
blk->whenReady = 0;
- blk->asid = -1;
blk->isTouched = false;
blk->size = blkSize;
sets[i].blks[j]=blk;
// probe cache for presence of given block.
bool
-LRU::probe(int asid, Addr addr) const
+LRU::probe(Addr addr) const
{
// return(findBlock(Read, addr, asid) != 0);
Addr tag = extractTag(addr);
unsigned myset = extractSet(addr);
- LRUBlk *blk = sets[myset].findBlk(asid, tag);
+ LRUBlk *blk = sets[myset].findBlk(tag);
return (blk != NULL); // true if in cache
}
LRUBlk*
-LRU::findBlock(Addr addr, int asid, int &lat)
+LRU::findBlock(Addr addr, int &lat)
{
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- LRUBlk *blk = sets[set].findBlk(asid, tag);
+ LRUBlk *blk = sets[set].findBlk(tag);
lat = hitLatency;
if (blk != NULL) {
// move this block to head of the MRU list
LRU::findBlock(Packet * &pkt, int &lat)
{
Addr addr = pkt->getAddr();
- int asid = 0;//pkt->req->getAsid();
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- LRUBlk *blk = sets[set].findBlk(asid, tag);
+ LRUBlk *blk = sets[set].findBlk(tag);
lat = hitLatency;
if (blk != NULL) {
// move this block to head of the MRU list
}
LRUBlk*
-LRU::findBlock(Addr addr, int asid) const
+LRU::findBlock(Addr addr) const
{
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- LRUBlk *blk = sets[set].findBlk(asid, tag);
+ LRUBlk *blk = sets[set].findBlk(tag);
return blk;
}
}
void
-LRU::invalidateBlk(int asid, Addr addr)
+LRU::invalidateBlk(Addr addr)
{
- LRUBlk *blk = findBlock(addr, asid);
+ LRUBlk *blk = findBlock(addr);
if (blk) {
blk->status = 0;
blk->isTouched = false;
}
void
-LRU::doCopy(Addr source, Addr dest, int asid, PacketList &writebacks)
+LRU::doCopy(Addr source, Addr dest, PacketList &writebacks)
{
assert(source == blkAlign(source));
assert(dest == blkAlign(dest));
- LRUBlk *source_blk = findBlock(source, asid);
+ LRUBlk *source_blk = findBlock(source);
assert(source_blk);
- LRUBlk *dest_blk = findBlock(dest, asid);
+ LRUBlk *dest_blk = findBlock(dest);
if (dest_blk == NULL) {
// Need to do a replacement
Request *search = new Request(dest,1,0);
writebacks.push_back(writeback);
}
dest_blk->tag = extractTag(dest);
- dest_blk->asid = asid;
delete search;
delete pkt;
}
* @param tag The Tag to find.
* @return Pointer to the block if found.
*/
- LRUBlk* findBlk(int asid, Addr tag) const;
+ LRUBlk* findBlk(Addr tag) const;
/**
* Move the given block to the head of the list.
* @param addr The address to find.
* @return True if the address is in the cache.
*/
- bool probe(int asid, Addr addr) const;
+ bool probe(Addr addr) const;
/**
* Invalidate the block containing the given address.
* @param asid The address space ID.
* @param addr The address to invalidate.
*/
- void invalidateBlk(int asid, Addr addr);
+ void invalidateBlk(Addr addr);
/**
* Finds the given address in the cache and update replacement data.
* @param lat The access latency.
* @return Pointer to the cache block if found.
*/
- LRUBlk* findBlock(Addr addr, int asid, int &lat);
+ LRUBlk* findBlock(Addr addr, int &lat);
/**
* Finds the given address in the cache, do not update replacement data.
* @param asid The address space ID.
* @return Pointer to the cache block if found.
*/
- LRUBlk* findBlock(Addr addr, int asid) const;
+ LRUBlk* findBlock(Addr addr) const;
/**
* Find a replacement block for the address provided.
* @param asid The address space DI.
* @param writebacks List for any generated writeback pktuests.
*/
- void doCopy(Addr source, Addr dest, int asid, PacketList &writebacks);
+ void doCopy(Addr source, Addr dest, PacketList &writebacks);
/**
* No impl.
// probe cache for presence of given block.
bool
-Split::probe(int asid, Addr addr) const
+Split::probe(Addr addr) const
{
- bool success = lru->probe(asid, addr);
+ bool success = lru->probe(addr);
if (!success) {
if (lifo && lifo_net)
- success = lifo_net->probe(asid, addr);
+ success = lifo_net->probe(addr);
else if (lru_net)
- success = lru_net->probe(asid, addr);
+ success = lru_net->probe(addr);
}
return success;
memHash[aligned] = 1;
}
- SplitBlk *blk = lru->findBlock(pkt->getAddr(), pkt->req->getAsid(), lat);
+ SplitBlk *blk = lru->findBlock(pkt->getAddr(), lat);
if (blk) {
if (pkt->nic_pkt()) {
NR_CP_hits++;
}
} else {
if (lifo && lifo_net) {
- blk = lifo_net->findBlock(pkt->getAddr(), pkt->req->getAsid(), lat);
+ blk = lifo_net->findBlock(pkt->getAddr(), lat);
} else if (lru_net) {
- blk = lru_net->findBlock(pkt->getAddr(), pkt->req->getAsid(), lat);
+ blk = lru_net->findBlock(pkt->getAddr(), lat);
}
if (blk) {
if (pkt->nic_pkt()) {
}
SplitBlk*
-Split::findBlock(Addr addr, int asid, int &lat)
+Split::findBlock(Addr addr, int &lat)
{
- SplitBlk *blk = lru->findBlock(addr, asid, lat);
+ SplitBlk *blk = lru->findBlock(addr, lat);
if (!blk) {
if (lifo && lifo_net) {
- blk = lifo_net->findBlock(addr, asid, lat);
+ blk = lifo_net->findBlock(addr, lat);
} else if (lru_net) {
- blk = lru_net->findBlock(addr, asid, lat);
+ blk = lru_net->findBlock(addr, lat);
}
}
}
SplitBlk*
-Split::findBlock(Addr addr, int asid) const
+Split::findBlock(Addr addr) const
{
- SplitBlk *blk = lru->findBlock(addr, asid);
+ SplitBlk *blk = lru->findBlock(addr);
if (!blk) {
if (lifo && lifo_net) {
- blk = lifo_net->findBlock(addr, asid);
+ blk = lifo_net->findBlock(addr);
} else if (lru_net) {
- blk = lru_net->findBlock(addr, asid);
+ blk = lru_net->findBlock(addr);
}
}
}
void
-Split::invalidateBlk(int asid, Addr addr)
+Split::invalidateBlk(Addr addr)
{
- SplitBlk *blk = lru->findBlock(addr, asid);
+ SplitBlk *blk = lru->findBlock(addr);
if (!blk) {
if (lifo && lifo_net)
- blk = lifo_net->findBlock(addr, asid);
+ blk = lifo_net->findBlock(addr);
else if (lru_net)
- blk = lru_net->findBlock(addr, asid);
+ blk = lru_net->findBlock(addr);
if (!blk)
return;
}
void
-Split::doCopy(Addr source, Addr dest, int asid, PacketList &writebacks)
+Split::doCopy(Addr source, Addr dest, PacketList &writebacks)
{
- if (lru->probe(asid, source))
- lru->doCopy(source, dest, asid, writebacks);
+ if (lru->probe( source))
+ lru->doCopy(source, dest, writebacks);
else {
if (lifo && lifo_net)
- lifo_net->doCopy(source, dest, asid, writebacks);
+ lifo_net->doCopy(source, dest, writebacks);
else if (lru_net)
- lru_net->doCopy(source, dest, asid, writebacks);
+ lru_net->doCopy(source, dest, writebacks);
}
}
* @param addr The address to find.
* @return True if the address is in the cache.
*/
- bool probe(int asid, Addr addr) const;
+ bool probe(Addr addr) const;
/**
* Invalidate the block containing the given address.
* @param asid The address space ID.
* @param addr The address to invalidate.
*/
- void invalidateBlk(int asid, Addr addr);
+ void invalidateBlk(Addr addr);
/**
* Finds the given address in the cache and update replacement data.
* @param lat The access latency.
* @return Pointer to the cache block if found.
*/
- SplitBlk* findBlock(Addr addr, int asid, int &lat);
+ SplitBlk* findBlock(Addr addr, int &lat);
/**
* Finds the given address in the cache and update replacement data.
* @param asid The address space ID.
* @return Pointer to the cache block if found.
*/
- SplitBlk* findBlock(Addr addr, int asid) const;
+ SplitBlk* findBlock(Addr addr) const;
/**
* Find a replacement block for the address provided.
* @param asid The address space DI.
* @param writebacks List for any generated writeback pktuests.
*/
- void doCopy(Addr source, Addr dest, int asid, PacketList &writebacks);
+ void doCopy(Addr source, Addr dest, PacketList &writebacks);
/**
* No impl.
using namespace std;
SplitBlk*
-LIFOSet::findBlk(int asid, Addr tag) const
+LIFOSet::findBlk(Addr tag) const
{
for (SplitBlk *blk = firstIn; blk != NULL; blk = blk->next) {
if (blk->tag == tag && blk->isValid()) {
// probe cache for presence of given block.
bool
-SplitLIFO::probe(int asid, Addr addr) const
+SplitLIFO::probe(Addr addr) const
{
Addr tag = extractTag(addr);
unsigned myset = extractSet(addr);
- SplitBlk* blk = sets[myset].findBlk(asid, tag);
+ SplitBlk* blk = sets[myset].findBlk(tag);
return (blk != NULL);
}
SplitBlk*
-SplitLIFO::findBlock(Addr addr, int asid, int &lat)
+SplitLIFO::findBlock(Addr addr, int &lat)
{
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- SplitBlk *blk = sets[set].findBlk(asid, tag);
+ SplitBlk *blk = sets[set].findBlk(tag);
lat = hitLatency;
SplitLIFO::findBlock(Packet * &pkt, int &lat)
{
Addr addr = pkt->getAddr();
- int asid = pkt->req->getAsid();
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- SplitBlk *blk = sets[set].findBlk(asid, tag);
+ SplitBlk *blk = sets[set].findBlk(tag);
if (blk) {
DPRINTF(Split, "Found LIFO blk %#x in set %d, with tag %#x\n",
}
SplitBlk*
-SplitLIFO::findBlock(Addr addr, int asid) const
+SplitLIFO::findBlock(Addr addr) const
{
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- SplitBlk *blk = sets[set].findBlk(asid, tag);
+ SplitBlk *blk = sets[set].findBlk(tag);
return blk;
}
}
void
-SplitLIFO::invalidateBlk(int asid, Addr addr)
+SplitLIFO::invalidateBlk(Addr addr)
{
- SplitBlk *blk = findBlock(addr, asid);
+ SplitBlk *blk = findBlock(addr);
if (blk) {
blk->status = 0;
blk->isTouched = false;
}
void
-SplitLIFO::doCopy(Addr source, Addr dest, int asid, PacketList &writebacks)
+SplitLIFO::doCopy(Addr source, Addr dest, PacketList &writebacks)
{
//Copy Unsuported for now
#if 0
assert(source == blkAlign(source));
assert(dest == blkAlign(dest));
- SplitBlk *source_blk = findBlock(source, asid);
+ SplitBlk *source_blk = findBlock(source);
assert(source_blk);
- SplitBlk *dest_blk = findBlock(dest, asid);
+ SplitBlk *dest_blk = findBlock(dest);
if (dest_blk == NULL) {
// Need to do a replacement
Packet * pkt = new Packet();
// Need to writeback data.
pkt = buildWritebackReq(regenerateBlkAddr(dest_blk->tag,
dest_blk->set),
- dest_blk->req->asid,
dest_blk->xc,
blkSize,
(cache->doData())?dest_blk->data:0,
writebacks.push_back(pkt);
}
dest_blk->tag = extractTag(dest);
- dest_blk->req->asid = asid;
/**
* @todo Do we need to pass in the execution context, or can we
* assume its the same?
* @param tag the Tag you are looking for
* @return Pointer to the block, if found, NULL otherwise
*/
- SplitBlk* findBlk(int asid, Addr tag) const;
+ SplitBlk* findBlk(Addr tag) const;
void moveToLastIn(SplitBlk *blk);
void moveToFirstIn(SplitBlk *blk);
* @param addr The address to find.
* @return True if the address is in the cache.
*/
- bool probe(int asid, Addr addr) const;
+ bool probe( Addr addr) const;
/**
* Invalidate the block containing the given address.
* @param asid The address space ID.
* @param addr The address to invalidate.
*/
- void invalidateBlk(int asid, Addr addr);
+ void invalidateBlk(Addr addr);
/**
* Finds the given address in the cache and update replacement data.
* @param lat The access latency.
* @return Pointer to the cache block if found.
*/
- SplitBlk* findBlock(Addr addr, int asid, int &lat);
+ SplitBlk* findBlock(Addr addr, int &lat);
/**
* Finds the given address in the cache and update replacement data.
* @param asid The address space ID.
* @return Pointer to the cache block if found.
*/
- SplitBlk* findBlock(Addr addr, int asid) const;
+ SplitBlk* findBlock(Addr addr) const;
/**
* Find a replacement block for the address provided.
* @param asid The address space DI.
* @param writebacks List for any generated writeback pktuests.
*/
- void doCopy(Addr source, Addr dest, int asid, PacketList &writebacks);
+ void doCopy(Addr source, Addr dest, PacketList &writebacks);
/**
* No impl.
using namespace std;
SplitBlk*
-SplitCacheSet::findBlk(int asid, Addr tag) const
+SplitCacheSet::findBlk(Addr tag) const
{
for (int i = 0; i < assoc; ++i) {
if (blks[i]->tag == tag && blks[i]->isValid()) {
// table; won't matter because the block is invalid
blk->tag = j;
blk->whenReady = 0;
- blk->asid = -1;
blk->isTouched = false;
blk->size = blkSize;
sets[i].blks[j]=blk;
// probe cache for presence of given block.
bool
-SplitLRU::probe(int asid, Addr addr) const
+SplitLRU::probe(Addr addr) const
{
// return(findBlock(Read, addr, asid) != 0);
Addr tag = extractTag(addr);
unsigned myset = extractSet(addr);
- SplitBlk *blk = sets[myset].findBlk(asid, tag);
+ SplitBlk *blk = sets[myset].findBlk(tag);
return (blk != NULL); // true if in cache
}
SplitBlk*
-SplitLRU::findBlock(Addr addr, int asid, int &lat)
+SplitLRU::findBlock(Addr addr, int &lat)
{
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- SplitBlk *blk = sets[set].findBlk(asid, tag);
+ SplitBlk *blk = sets[set].findBlk(tag);
lat = hitLatency;
if (blk != NULL) {
// move this block to head of the MRU list
SplitLRU::findBlock(Packet * &pkt, int &lat)
{
Addr addr = pkt->getAddr();
- int asid = pkt->req->getAsid();
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- SplitBlk *blk = sets[set].findBlk(asid, tag);
+ SplitBlk *blk = sets[set].findBlk(tag);
lat = hitLatency;
if (blk != NULL) {
// move this block to head of the MRU list
}
SplitBlk*
-SplitLRU::findBlock(Addr addr, int asid) const
+SplitLRU::findBlock(Addr addr) const
{
Addr tag = extractTag(addr);
unsigned set = extractSet(addr);
- SplitBlk *blk = sets[set].findBlk(asid, tag);
+ SplitBlk *blk = sets[set].findBlk(tag);
return blk;
}
}
void
-SplitLRU::invalidateBlk(int asid, Addr addr)
+SplitLRU::invalidateBlk(Addr addr)
{
- SplitBlk *blk = findBlock(addr, asid);
+ SplitBlk *blk = findBlock(addr);
if (blk) {
blk->status = 0;
blk->isTouched = false;
}
void
-SplitLRU::doCopy(Addr source, Addr dest, int asid, PacketList &writebacks)
+SplitLRU::doCopy(Addr source, Addr dest, PacketList &writebacks)
{
//Copy not supported for now
#if 0
assert(source == blkAlign(source));
assert(dest == blkAlign(dest));
- SplitBlk *source_blk = findBlock(source, asid);
+ SplitBlk *source_blk = findBlock(source);
assert(source_blk);
- SplitBlk *dest_blk = findBlock(dest, asid);
+ SplitBlk *dest_blk = findBlock(dest);
if (dest_blk == NULL) {
// Need to do a replacement
Packet * pkt = new Packet();
// Need to writeback data.
pkt = buildWritebackReq(regenerateBlkAddr(dest_blk->tag,
dest_blk->set),
- dest_blk->req->asid,
dest_blk->xc,
blkSize,
(cache->doData())?dest_blk->data:0,
writebacks.push_back(pkt);
}
dest_blk->tag = extractTag(dest);
- dest_blk->req->asid = asid;
/**
* @todo Do we need to pass in the execution context, or can we
* assume its the same?
* @param tag The Tag to find.
* @return Pointer to the block if found.
*/
- SplitBlk* findBlk(int asid, Addr tag) const;
+ SplitBlk* findBlk(Addr tag) const;
/**
* Move the given block to the head of the list.
* @param addr The address to find.
* @return True if the address is in the cache.
*/
- bool probe(int asid, Addr addr) const;
+ bool probe(Addr addr) const;
/**
* Invalidate the block containing the given address.
* @param asid The address space ID.
* @param addr The address to invalidate.
*/
- void invalidateBlk(int asid, Addr addr);
+ void invalidateBlk(Addr addr);
/**
* Finds the given address in the cache and update replacement data.
* @param lat The access latency.
* @return Pointer to the cache block if found.
*/
- SplitBlk* findBlock(Addr addr, int asid, int &lat);
+ SplitBlk* findBlock(Addr addr, int &lat);
/**
* Finds the given address in the cache and update replacement data.
* @param asid The address space ID.
* @return Pointer to the cache block if found.
*/
- SplitBlk* findBlock(Addr addr, int asid) const;
+ SplitBlk* findBlock(Addr addr) const;
/**
* Find a replacement block for the address provided.
* @param asid The address space DI.
* @param writebacks List for any generated writeback pktuests.
*/
- void doCopy(Addr source, Addr dest, int asid, PacketList &writebacks);
+ void doCopy(Addr source, Addr dest, PacketList &writebacks);
/**
* No impl.
projects / gem5.git / commitdiff